JAJSJM0B june   2021  – april 2023 JFE150

PRODUCTION DATA  

  1.   1
  2. 1 特長
  3. 2 アプリケーション
  4. 3 概要
  5. 4 Revision History
  6. 5 Pin Configuration and Functions
  7. 6 Specifications
    1. 6.1 Absolute Maximum Ratings
    2. 6.2 ESD Ratings
    3. 6.3 Recommended Operating Conditions
    4. 6.4 Thermal Information
    5. 6.5 Electrical Characteristics
    6. 6.6 Typical Characteristics
  8. 7 Parameter Measurement Information
    1. 7.1 AC Measurement Configurations
  9. 8 Detailed Description
    1. 8.1 Overview
    2. 8.2 Functional Block Diagram
    3. 8.3 Feature Description
      1. 8.3.1 Ultra-Low Noise
      2. 8.3.2 Low Gate Current
      3. 8.3.3 Input Protection
    4. 8.4 Device Functional Modes
  10. 9 Application and Implementation
    1. 9.1 Application Information
      1. 9.1.1 Input Protection Diodes
      2. 9.1.2 Capacitive Transducer Input Stage
      3. 9.1.3 Common-Source Amplifier
      4. 9.1.4 Composite Amplifiers
    2. 9.2 Typical Application
      1. 9.2.1 Design Requirements
      2. 9.2.2 Detailed Design Procedure
      3. 9.2.3 Application Curves
    3. 9.3 Power Supply Recommendations
    4. 9.4 Layout
      1. 9.4.1 Layout Guidelines
      2. 9.4.2 Layout Example
  11. 10Device and Documentation Support
    1. 10.1 Device Support
      1. 10.1.1 Development Support
        1. 10.1.1.1 PSpice® for TI
        2. 10.1.1.2 TINA-TI™シミュレーション・ソフトウェア (無償ダウンロード)
        3. 10.1.1.3 TI のリファレンス・デザイン
        4. 10.1.1.4 フィルタ設計ツール
    2. 10.2 Documentation Support
      1. 10.2.1 Related Documentation
    3. 10.3 ドキュメントの更新通知を受け取る方法
    4. 10.4 サポート・リソース
    5. 10.5 Trademarks
    6. 10.6 静電気放電に関する注意事項
    7. 10.7 用語集
  12. 11Mechanical, Packaging, and Orderable Information

パッケージ・オプション

メカニカル・データ（パッケージ｜ピン）
サーマルパッド・メカニカル・データ
発注情報

6.6 Typical Characteristics

at TA = 25°C, IDS = 2 mA, common-source configuration, and VDS = 5 V (unless otherwise noted)

GUID-20210521-CA0I-10N1-SCS9-GJV9ZW3XCW0N-low.png
 
Figure 6-1 Drain-to-Source Current vs Gate-to-Source Voltage
GUID-20210521-CA0I-6PBN-R0HF-BMSLZF64SNLW-low.png
 
Figure 6-3 Drain-to-Source Current vs Drain-to-Source Voltage
GUID-20210618-CA0I-2JH7-HL8X-70CBJ5SGSK0H-low.png
 
Figure 6-5 Gate Current vs Drain-to-Source Voltage
GUID-20210618-CA0I-BFL0-3T1N-CFV4FKR2SX5R-low.png
VDS = 5 V
Figure 6-7 Gate-to-Source Voltage vs Temperature
GUID-20210618-CA0I-C55B-MQP0-VCFS9KMSNJXR-low.png
 
Figure 6-9 Input-Referred Noise Density vs Frequency
GUID-20210618-CA0I-M5WR-RGPW-NZBLD8NKFXJ2-low.png
f = 1 kHz
Figure 6-11 Input-Referred Noise Spectral Density vs Drain‑to‑Source Current
GUID-20210521-CA0I-HKKV-BD57-GXTN2HHS3TWD-low.svg
 
Figure 6-2 Drain-to-Source Current vs Drain-to-Source Voltage
GUID-20210521-CA0I-K8QT-1TQH-NTWKTTMHH3CH-low.png
 
Figure 6-4 Common Source Transconductance vs Drain-to-Source Current
GUID-20210621-CA0I-WBGK-VTML-SKDCNVPMNKJ2-low.png
 
Figure 6-6 Gate Current vs Gate-to-Source Voltage
GUID-20210521-CA0I-VBJT-RDKM-KCBVHHGGFN1K-low.png
 
Figure 6-8 IDSS vs Drain-to-Source Voltage
GUID-20210616-CA0I-NZVX-PRLG-KDLBTKZF17KC-low.png
f = 1 kHz
Figure 6-10 Noise Density Contributors vs Input Gate Resistance
GUID-20210618-CA0I-K7TP-WBZ4-LFMXJDFG3TLL-low.png
 
Figure 6-12 Input, Output, and Reverse Transfer Capacitance vs Drain-to-Source Voltage