SNOSBH4E May   1998  – October 2015 LM10

PRODUCTION DATA.  

  1. 1 Features
  2. 2 Applications
  3. 3 Description
  4. 4 Revision History
  5. 5 Pin Configuration and Functions
  6. 6 Specifications
    1. 6.1 Absolute Maximum Ratings
    2. 6.2 Recommended Operating Conditions
    3. 6.3 Thermal Information
    4. 6.4 Electrical Characteristics LM10/LM10B
    5. 6.5 Electrical Characteristics, LM10C
    6. 6.6 Electrical Characteristics, LM10BL
    7. 6.7 Electrical Characteristics, LM10CL
    8. 6.8 Typical Characteristics
      1. 6.8.1 Typical Characteristics (Op Amp)
      2. 6.8.2 Typical Characteristics (Reference)
  7. 7 Detailed Description
    1. 7.1 Overview
    2. 7.2 Functional Block Diagram
    3. 7.3 Feature Description
      1. 7.3.1 Operating Characteristics
      2. 7.3.2 Common-Mode Voltage Range
      3. 7.3.3 Operational Amplifier
      4. 7.3.4 Voltage Reference
    4. 7.4 Device Functional Modes
      1. 7.4.1 Floating Mode
      2. 7.4.2 Linear Operation
  8. 8 Application and Implementation
    1. 8.1 Application Information
    2. 8.2 Typical Application
      1. 8.2.1 Design Requirements
      2. 8.2.2 Detailed Design Procedure
      3. 8.2.3 Application Curve
    3. 8.3 System Examples
      1. 8.3.1 Operational Amplifier Offset Adjustment
      2. 8.3.2 Positive Regulators
      3. 8.3.3 Reference and Internal Regulator
  9. 9 Power Supply Recommendations
  10. 10Layout
    1. 10.1 Layout Guidelines
    2. 10.2 Layout Example
  11. 11Device and Documentation Support
    1. 11.1 Device Support
      1. 11.1.1 Device Nomenclature
        1. 11.1.1.1 Definition of Terms
    2. 11.2 Documentation Support
      1. 11.2.1 Related Documentation
    3. 11.3 Community Resources
    4. 11.4 Trademarks
    5. 11.5 Electrostatic Discharge Caution
    6. 11.6 Glossary
  12. 12Mechanical, Packaging, and Orderable Information

パッケージ・オプション

メカニカル・データ（パッケージ｜ピン）
サーマルパッド・メカニカル・データ

6 Specifications

6.1 Absolute Maximum Ratings

See (5)(1)(6)
MIN MAX UNIT
Total supply voltage LM10/LM10B/LM10C 45 V
LM10BL/LM10CL 7 V
Differential input voltage(2) LM10/LM10B/LM10C ±40 V
LM10BL/LM10CL ±7 V
Power dissipation(3) Internally limited
Output short-circuit duration(4) Continuous
Lead temperature TO Soldering (10 seconds) 300 °C
DIP Soldering (10 seconds)  260 °C
Vapor phase (60 seconds) 215 °C
Infrared (15 seconds) 220 °C
Maximum junction temperature LM10 150 °C
LM10B 100 °C
LM10C 85 °C
Storage temperature, Tstg −55 150 °C
(1) Stresses beyond those listed under Absolute Maximum Ratings may cause permanent damage to the device. These are stress ratings only, and functional operation of the device at these or any other conditions beyond those indicated under Recommended Operating Conditions is not implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.
(2) The Input voltage can exceed the supply voltages provided that the voltage from the input to any other terminal does not exceed the maximum differential input voltage and excess dissipation is accounted for when VIN < V−.
(3) The maximum, operating-junction temperature is 150°C for the LM10, 100°C for the LM10B(L) and 85°C for the LM10C(L). At elevated temperatures, devices must be derated based on package thermal resistance.
(4) Internal thermal limiting prevents excessive heating that could result in sudden failure, but the IC can be subjected to accelerated stress with a shorted output and worst-case conditions.
(5) Refer to RETS10X for LM10H military specifications.
(6) If Military/Aerospace specified devices are required, please contact the TI Sales Office/Distributors for availability and specifications.

6.2 Recommended Operating Conditions

over operating free-air temperature range (unless otherwise noted)
MIN NOM MAX UNIT
VS Supply input voltage range (V–) – (V+) 1.2 40 V
VCM Common-mode voltage (V–) (V+) – 0.85 V
VREF Reference voltage 0.2 V
IREF Reference current 0 1 mA

6.3 Thermal Information

THERMAL METRIC(1) LM10 UNIT
NEV (SDIP) NPA (SOIC) P (PDIP)
8 PINS 14 PINS 8 PINS
RθJA Junction-to-ambient thermal resistance 150 90 87 °C/W
RθJC(top) Junction-to-case (top) thermal resistance 45 — — °C/W
(1) For more information about traditional and new thermal metrics, see the Semiconductor and IC Package Thermal Metrics application report, SPRA953.

6.4 Electrical Characteristics LM10/LM10B

TJ=25°C unless otherwise specified(1)
PARAMETER TEST CONDITIONS MIN TYP MAX UNIT
Input offset voltage TJ=25°C 0.3 2 mV
TMIN ≤ TJ ≤ TMAX (see (1)) 3 mV
Input offset current(2) TJ=25°C 0.25 0.7 nA
TMIN ≤ TJ ≤ TMAX (see (1)) 1.5 nA
Input bias current TJ=25°C 10 20 nA
TMIN ≤ TJ ≤ TMAX (see (1)) 30 nA
Input resistance TJ=25°C 250 500 kΩ
TMIN ≤ TJ ≤ TMAX (see (1)) 150 kΩ
Large signal voltage gain VS = ±20 V, IOUT = 0 120 400 V/mV
VOUT = ±19.95 V, TMIN ≤ TJ ≤ TMAX (see (1)) 80 V/mV
VS = ±20 V, VOUT = ±19.4 V 50 130 V/mV
IOUT = ±20 mA, TMIN ≤ TJ ≤ TMAX (see (1)) 20 V/mV
IOUT = ±15 mA, TMIN ≤ TJ ≤ TMAX (see (1)) 20 V/mV
VS = ±0.6 V, IOUT = ±2 mA 1.5 3 V/mV
VS = ±0.65 V, IOUT = ±2 mA, TMIN ≤ TJ ≤ TMAX (see (1)) 1.5 3 V/mV
VOUT = ±0.4 V, TMIN ≤ TJ ≤ TMAX (see (1)) 0.5 V/mV
VOUT = ±0.3 V, VCM = −0.4 V, TMIN ≤ TJ ≤ TMAX (see (1)) 0.5 V/mV
Shunt gain(3) 1.2 V ≤ VOUT ≤ 40 V, RL = 1.1 kΩ 14 33 V/mV
1.3 V ≤ VOUT ≤ 40 V, RL = 1.1 kΩ, TMIN ≤ TJ ≤ TMAX (see (1)) 14 33 V/mV
0.1 mA ≤ IOUT ≤ 5 mA, TMIN ≤ TJ ≤ TMAX (see (1)) 6 V/mV
1.5 V ≤ V+ ≤ 40 V, RL = 250 Ω 8 25 V/mV
0.1 mA ≤ IOUT ≤ 20 mA, TMIN ≤ TJ ≤ TMAX (see (1)) 4 V/mV
Common-mode rejection −20 V ≤ VCM ≤ 19.15 V 93 102 dB
−20 V ≤ VCM ≤ 19 V, TMIN ≤ TJ ≤ TMAX (see (1)) 93 102 dB
VS = ±20 V, TMIN ≤ TJ ≤ TMAX (see (1)) 87 dB
Supply-voltage rejection −0.2 V ≥ V− ≥ −39 V 90 96 dB
V+ = 1 V, TMIN ≤ TJ ≤ TMAX (see (1)) 84 dB
V+ = 1.1 V, TMIN ≤ TJ ≤ TMAX (see (1)) 84 dB
1 V ≤ V+ ≤ 39.8 V 96 106 dB
1.1 V ≤ V+ ≤ 39.8 V, TMIN ≤ TJ ≤ TMAX (see (1)) 96 106 dB
V− = −0.2 V, TMIN ≤ TJ ≤ TMAX (see (1)) 90 dB
Offset voltage drift 2 μV/°C
Offset current drift 2 pA/°C
Bias current drift TC < 100°C 60 pA/°C
Line regulation 1.2 V ≤ VS ≤ 40 V 0.001 0.003 %/V
1.3 V ≤ VS ≤ 40 V, TMIN ≤ TJ ≤ TMAX (see (1)) 0.001 0.003 %/V
0 ≤ IREF ≤ 1 mA, VREF = 200 mV, TMIN ≤ TJ ≤ TMAX (see (1)) 0.006 %/V
Load regulation 0 ≤ IREF ≤ 1 mA 0.01% 0.1%
V+− VREF ≥ 1 V, TMIN ≤ TJ ≤ TMAX (see (1)) 0.15%
V+− VREF ≥ 1.1 V, TMIN ≤ TJ ≤ TMAX (see (1)) 0.15%
Amplifier gain 0.2 V ≤ VREF ≤ 35 V TJ=25°C 50 75 V/mV
TMIN ≤ TJ ≤ TMAX (see (1)) 23 V/mV
Feedback sense voltage TJ=25°C 195 200 205 mV
TMIN ≤ TJ ≤ TMAX (see (1)) 194 206 mV
Feedback current TJ=25°C 20 50 nA
TMIN ≤ TJ ≤ TMAX (see (1)) 65 nA
Reference drift 0.002 %/°C
Supply current TJ=25°C 270 400 μA
TMIN ≤ TJ ≤ TMAX (see (1)) 500 μA
Supply current change 1.2 V ≤ VS ≤ 40 V TJ=25°C 15 μA
TMIN ≤ TJ ≤ TMAX (see (1)) 75
1.3 V ≤ VS ≤ 40 V TJ=25°C 15 μA
TMIN ≤ TJ ≤ TMAX (see (1)) 75
(1) These specifications apply for V− ≤ VCM ≤ V+− 0.85 V, 1 V (TMIN ≤ TJ ≤ TMAX), 1.2 V, 1.3 V (TMIN ≤ TJ ≤ TMAX) < VS ≤ VMAX, VREF = 0.2 V and 0 ≤ IREF ≤ 1 mA, unless otherwise specified: VMAX = 40 V for the standard part and 6.5 V for the low voltage part. The full-temperature-range operation is −55°C to 125°C for the LM10, −25°C to 85°C for the LM10B(L) and 0°C to 70°C for the LM10C(L). The specifications do not include the effects of thermal gradients (τ1 ≃ 20 ms), die heating (τ2 ≃ 0.2 s) or package heating. Gradient effects are small and tend to offset the electrical error (see curves).
(2) For TJ > 90°C, IOS may exceed 1.5 nA for VCM = V−. With TJ = 125°C and V− ≤ VCM ≤ V− + 0.1 V, IOS ≤ 5 nA.
(3) This defines operation in floating applications such as the bootstrapped regulator or two-wire transmitter. Output is connected to the V+ terminal of the IC and input common mode is referred to V− (see System Examples). Effect of larger output-voltage swings with higher load resistance can be accounted for by adding the positive-supply rejection error.

6.5 Electrical Characteristics, LM10C

TJ=25°C unless otherwise specified(1)
PARAMETER TEST CONDITIONS MIN TYP MAX UNIT
Input offset voltage TJ=25°C 0.5 4 mV
TMIN ≤ TJ ≤ TMAX (see (1)) 5 mV
Input offset current(2) TJ=25°C 0.4 2 nA
TMIN ≤ TJ ≤ TMAX (see (1)) 3 nA
Input bias current TJ=25°C 12 30 nA
TMIN ≤ TJ ≤ TMAX (see (1)) 40 nA
Input resistance TJ=25°C 150 400 kΩ
TMIN ≤ TJ ≤ TMAX (see (1)) 115 kΩ
Large signal voltage gain VS = ±20 V, IOUT = 0 80 400 V/mV
VOUT = ±19.95 V, TMIN ≤ TJ ≤ TMAX (see (1)) 50 V/mV
VS = ±20 V, VOUT = ±19.4 V 25 130 V/mV
IOUT = ±20 mA, TMIN ≤ TJ ≤ TMAX (see (1)) 15 V/mV
IOUT = ±15 mA, TMIN ≤ TJ ≤ TMAX (see (1)) 15 V/mV
VS = ±0.6 V, IOUT = ±2 mA 1 3 V/mV
VS = 0.65 V, IOUT = ±2 mA, TMIN ≤ TJ ≤ TMAX (see (1)) 1 3 V/mV
VOUT = ±0.4 V, TMIN ≤ TJ ≤ TMAX (see (1)) 0.75 V/mV
VOUT = ±0.3 V, VCM = −0.4 V, TMIN ≤ TJ ≤ TMAX (see (1)) 0.75 V/mV
Shunt gain(3) 1.2 V ≤ VOUT ≤ 40 V, RL = 1.1 kΩ 10 33 V/mV
1.3 V ≤ VOUT ≤ 40 V, RL = 1.1 kΩ, TMIN ≤ TJ ≤ TMAX (see (1)) 10 33 V/mV
0.1 mA ≤ IOUT ≤ 5 mA, TMIN ≤ TJ ≤ TMAX (see (1)) 6 V/mV
1.5 V ≤ V+ ≤ 40 V, RL = 250 Ω 6 25 V/mV
0.1 mA ≤ IOUT ≤ 20 mA, TMIN ≤ TJ ≤ TMAX (see (1)) 4 V/mV
Common-mode rejection −20 V ≤ VCM ≤ 19.15 V 90 102 dB
−20 V ≤ VCM ≤ 19 V 90 102 dB
VS = ±20 V, TMIN ≤ TJ ≤ TMAX (see (1)) 87 dB
Supply-voltage rejection −0.2 V ≥ V− ≥ −39 V 87 96 dB
V+ = 1 V, TMIN ≤ TJ ≤ TMAX (see (1)) 84 dB
V+ = 1.1 V, TMIN ≤ TJ ≤ TMAX (see (1)) 84 dB
1 V ≤ V+ ≤ 39.8 V 93 106 dB
1.1 V ≤ V+ ≤ 39.8 V, TMIN ≤ TJ ≤ TMAX (see (1)) 93 106 dB
V− = −0.2 V, TMIN ≤ TJ ≤ TMAX (see (1)) 90 dB
Offset voltage drift 5 μV/°C
Offset current drift 5 pA/°C
Bias current drift TC < 100°C 90 pA/°C
Line regulation 1.2 V ≤ VS ≤ 40 V 0.001 0.008 %/V
1.3 V ≤ VS ≤ 40 V, TMIN ≤ TJ ≤ TMAX (see (1)) 0.001 0.008 %/V
0 ≤ IREF ≤ 1 mA, VREF = 200 mV, TMIN ≤ TJ ≤ TMAX (see (1)) 0.01 %/V
Load regulation 0 ≤ IREF ≤ 1 mA 0.01% 0.15%
V+ − VREF ≥ 1 V, TMIN ≤ TJ ≤ TMAX (see (1)) 0.2%
V+ − VREF≥ 1.1 V, TMIN ≤ TJ ≤ TMAX (see (1)) 0.2%
Amplifier gain 0.2 V ≤ VREF ≤ 35 V TJ=25°C 25 70 V/mV
TMIN ≤ TJ ≤ TMAX (see (1)) 15 V/mV
Feedback sense voltage TJ=25°C 190 200 210 mV
TMIN ≤ TJ ≤ TMAX (see (1)) 189 211 mV
Feedback current TJ=25°C 22 75 nA
TMIN ≤ TJ ≤ TMAX (see (1)) 90 nA
Reference drift 0.003 %/°C
Supply current TJ=25°C 300 500 μA
TMIN ≤ TJ ≤ TMAX (see (1)) 570 μA
Supply current change 1.2 V ≤ VS ≤ 40 V TJ=25°C 15 μA
TMIN ≤ TJ ≤ TMAX (see (1)) 75
1.3 V ≤ VS ≤ 40 V TJ=25°C 15 μA
TMIN ≤ TJ ≤ TMAX (see (1)) 75
(1) These specifications apply for V− ≤ VCM ≤ V+− 0.85 V, 1 V (TMIN ≤ TJ ≤ TMAX), 1.2 V, 1.3 V (TMIN ≤ TJ ≤ TMAX) < VS ≤ VMAX, VREF = 0.2 V and 0 ≤ IREF ≤ 1 mA, unless otherwise specified: VMAX = 40 V for the standard part and 6.5 V for the low voltage part. The full-temperature-range operation is −55°C to 125°C for the LM10, −25°C to 85°C for the LM10B(L) and 0°C to 70°C for the LM10C(L). The specifications do not include the effects of thermal gradients (τ1 ≃ 20 ms), die heating (τ2 ≃ 0.2 s) or package heating. Gradient effects are small and tend to offset the electrical error (see curves).
(2) For TJ > 90°C, IOS may exceed 1.5 nA for VCM = V−. With TJ = 125°C and V− ≤ VCM ≤ V− + 0.1 V, IOS ≤ 5 nA.
(3) This defines operation in floating applications such as the bootstrapped regulator or two-wire transmitter. Output is connected to the V+ terminal of the IC and input common mode is referred to V− (see System Examples). Effect of larger output-voltage swings with higher load resistance can be accounted for by adding the positive-supply rejection error.

6.6 Electrical Characteristics, LM10BL

TJ=25°C unless otherwise specified.(1)
PARAMETER TEST CONDITIONS MIN TYP MAX UNIT
Input offset voltage TJ=25°C 0.3 2 mV
TMIN ≤ TJ ≤ TMAX (see (1)) 3 mV
Input offset current(2) TJ=25°C 0.1 0.7 nA
TMIN ≤ TJ ≤ TMAX (see (1)) 1.5 nA
Input bias current TJ=25°C 10 20 nA
TMIN ≤ TJ ≤ TMAX (see (1)) 30 nA
Input resistance TJ=25°C 250 500 kΩ
TMIN ≤ TJ ≤ TMAX (see (1)) 150 kΩ
Large signal voltage gain VS = ±3.25 V, IOUT = 0 60 300 V/mV
VOUT = ±3.2 V, TMIN ≤ TJ ≤ TMAX (see (1)) 40 V/mV
VS = ±3.25 V, IOUT = 10 mA 10 25 V/mV
VOUT = ±2.75 V, TMIN ≤ TJ ≤ TMAX (see (1)) 4 V/mV
VS = ±0.6 V, IOUT = ±2 mA 1.5 3 V/mV
VS = 0.65 V, IOUT = ±2 mA, TMIN ≤ TJ ≤ TMAX (see (1)) 1.5 3 V/mV
VOUT = ±0.4 V, VCM = −0.4 V, TMIN ≤ TJ ≤ TMAX (see (1)) 0.5 V/mV
VOUT = ±0.3 V, VCM = −0.4 V, TMIN ≤ TJ ≤ TMAX (see (1)) 0.5 V/mV
Shunt gain(3) 1.5 V ≤ V +≤ 6.5 V, RL = 500 Ω 8 30 V/mV
0.1 mA ≤ IOUT ≤ 10 mA, TMIN ≤ TJ ≤ TMAX (see (1)) 4 V/mV
Common-mode rejection −3.25 V ≤ VCM ≤ 2.4 V 89 102 dB
−3.25 V ≤ VCM ≤ 2.25 V, TMIN ≤ TJ ≤ TMAX (see (1))
VS = ±3.25 V, TMIN ≤ TJ ≤ TMAX (see (1)) 83 dB
Supply-voltage rejection −0.2 V ≥ V− ≥ −5.4 V 86 96 dB
V+ = 1 V, TMIN ≤ TJ ≤ TMAX (see (1)) 80 dB
V+ = 1.2 V, TMIN ≤ TJ ≤ TMAX (see (1)) 80 dB
1 V ≤ V+ ≤ 6.3 V 94 106 dB
1.1 V ≤ V+ ≤ 6.3 V, TMIN ≤ TJ ≤ TMAX (see (1)) 94 106 dB
V−=0.2 V, TMIN ≤ TJ ≤ TMAX (see (1)) 88 dB
Offset voltage drift 2 μV/°C
Offset current drift 2 pA/°C
Bias current drift 60 pA/°C
Line regulation 1.2 V ≤ VS ≤ 6.5 V 0.001 0.01 %/V
1.3 V ≤ VS ≤ 6.5 V, TMIN ≤ TJ ≤ TMAX (see (1)) 0.001 0.01 %/V
0 ≤ IREF ≤ 0.5 mA, VREF = 200 mV, TMIN ≤ TJ ≤ TMAX (see (1)) 0.02 %/V
Load regulation 0 ≤ IREF ≤ 0.5 mA 0.01% 0.1%
V+ − VREF ≥ 1 V, TMIN ≤ TJ ≤ TMAX (see (1)) 0.15%
V+− VREF ≥ 1.1 V, TMIN ≤ TJ ≤ TMAX (see (1)) 0.15%
Amplifier gain 0.2 V ≤ VREF ≤ 5.5 V TJ=25°C 30 70 V/mV
TMIN ≤ TJ ≤ TMAX (see (1)) 20 V/mV
Feedback sense voltage TJ=25°C 195 200 205 mV
TMIN ≤ TJ ≤ TMAX (see (1)) 194 206 mV
Feedback current TJ=25°C 20 50 nA
TMIN ≤ TJ ≤ TMAX (see (1)) 65 nA
Reference drift 0.002 %/°C
Supply current TJ=25°C 260 400 μA
TMIN ≤ TJ ≤ TMAX (see (1)) 500 μA
(1) These specifications apply for V− ≤ VCM ≤ V+− 0.85 V, 1 V (TMIN ≤ TJ ≤ TMAX), 1.2 V, 1.3 V (TMIN ≤ TJ ≤ TMAX) < VS ≤ VMAX, VREF = 0.2 V and 0 ≤ IREF ≤ 1 mA, unless otherwise specified: VMAX = 40 V for the standard part and 6.5 V for the low voltage part. The full-temperature-range operation is −55°C to 125°C for the LM10, −25°C to 85°C for the LM10B(L) and 0°C to 70°C for the LM10C(L). The specifications do not include the effects of thermal gradients (τ1 ≃ 20 ms), die heating (τ2 ≃ 0.2 s) or package heating. Gradient effects are small and tend to offset the electrical error (see curves).
(2) For TJ > 90°C, IOS may exceed 1.5 nA for VCM = V−. With TJ=125°C and V− ≤ VCM ≤ V−+ 0.1 V, IOS ≤ 5 nA.
(3) This defines operation in floating applications such as the bootstrapped regulator or two-wire transmitter. Output is connected to the V+ terminal of the IC and input common mode is referred to V− (see System Examples). Effect of larger output-voltage swings with higher load resistance can be accounted for by adding the positive-supply rejection error.

6.7 Electrical Characteristics, LM10CL

TJ=25°C unless otherwise specified.(1)
PARAMETER TEST CONDITIONS MIN TYP MAX UNIT
Input offset voltage TJ=25°C 0.5 4 mV
TMIN ≤ TJ ≤ TMAX (see (1)) 5 mV
Input offset current(2) TJ=25°C 0.2 2 nA
TMIN ≤ TJ ≤ TMAX (see (1)) 3 nA
Input bias current TJ=25°C 12 30 nA
TMIN ≤ TJ ≤ TMAX (see (1)) 40 nA
Input resistance TJ=25°C 150 400 kΩ
TMIN ≤ TJ ≤ TMAX (see (1)) 115 kΩ
Large signal voltage gain VS = ±3.25 V, IOUT = 0 40 300 V/mV
VOUT = ±3.2 V, TMIN ≤ TJ ≤ TMAX (see (1)) 25 V/mV
VS = ±3.25 V, IOUT = 10 mA 5 25 V/mV
VOUT = ±2.75 V, TMIN ≤ TJ ≤ TMAX (see (1)) 3 V/mV
VS = ±0.6 V, IOUT = ±2 mA 1 3 V/mV
VS = 0.65 V, IOUT = ±2 mA, TMIN ≤ TJ ≤ TMAX (see (1)) 1 3 V/mV
VOUT = ±0.4 V, VCM = −0.4 V, TMIN ≤ TJ ≤ TMAX (see (1)) 0.75 V/mV
VOUT = ±0.3 V, VCM = −0.4 V, TMIN ≤ TJ ≤ TMAX (see (1)) 0.75 V/mV
Shunt gain(3) 1.5 V ≤ V+ ≤ 6.5 V, RL= 500 Ω 6 30 V/mV
0.1 mA ≤ IOUT ≤ 10 mA, TMIN ≤ TJ ≤ TMAX (see (1)) 4 V/mV
Common-mode rejection −3.25 V ≤ VCM ≤ 2.4 V 80 102 dB
−3.25 V ≤ VCM ≤ 2.25 V, TMIN ≤ TJ ≤ TMAX (see (1)) 80 102 dB
VS = ±3.25 V, TMIN ≤ TJ ≤ TMAX (see (1)) 74 dB
Supply-voltage rejection −0.2 V ≥ V– ≥ −5.4 V 80 96 dB
V+ = 1 V, TMIN ≤ TJ ≤ TMAX (see (1)) 74 dB
V+ = 1.2 V, TMIN ≤ TJ ≤ TMAX (see (1)) 74 dB
1 V ≤ V+ ≤ 6.3 V 80 106 dB
1.1 V ≤ V+ ≤ 6.3 V, TMIN ≤ TJ ≤ TMAX (see (1)) 80 106 dB
V− = 0.2 V, TMIN ≤ TJ ≤ TMAX (see (1)) 74 dB
Offset voltage drift 5 μV/°C
Offset current drift 5 pA/°C
Bias current drift 90 pA/°C
Line regulation 1.2 V ≤ VS ≤ 6.5 V 0.001 0.02 %/V
1.3 V ≤ VS ≤ 6.5 V, TMIN ≤ TJ ≤ TMAX (see (1)) 0.001 0.02 %/V
0 ≤ IREF ≤ 0.5 mA, VREF = 200 mV, TMIN ≤ TJ ≤ TMAX (see (1)) 0.03 %/V
Load regulation 0 ≤ IREF ≤ 0.5 mA 0.01% 0.15%
V+− VREF ≥ 1 V, TMIN ≤ TJ ≤ TMAX (see (1)) 0.2%
V+− VREF ≥ 1.1 V, TMIN ≤ TJ ≤ TMAX (see (1)) 0.2%
Amplifier gain 0.2 V ≤ VREF ≤ 5.5 V TJ=25°C 20 70 V/mV
TMIN ≤ TJ ≤ TMAX (see (1)) 15 V/mV
Feedback sense voltage TJ=25°C 190 200 210 mV
TMIN ≤ TJ ≤ TMAX (see (1)) 189 211 mV
Feedback current TJ=25°C 22 75 nA
TMIN ≤ TJ ≤ TMAX (see (1)) 90 nA
Reference drift 0.003 %/°C
Supply current TJ=25°C 280 500 μA
TMIN ≤ TJ ≤ TMAX (see (1)) 570 μA
(1) These specifications apply for V− ≤ VCM ≤ V+− 0.85 V, 1 V (TMIN ≤ TJ ≤ TMAX), 1.2 V, 1.3 V (TMIN ≤ TJ ≤ TMAX) < VS ≤ VMAX, VREF = 0.2 V and 0 ≤ IREF ≤ 1 mA, unless otherwise specified: VMAX = 40 V for the standard part and 6.5 V for the low voltage part. The full-temperature-range operation is −55°C to 125°C for the LM10, −25°C to 85°C for the LM10B(L) and 0°C to 70°C for the LM10C(L). The specifications do not include the effects of thermal gradients (τ1 ≃ 20 ms), die heating (τ2 ≃ 0.2 s) or package heating. Gradient effects are small and tend to offset the electrical error (see curves).
(2) For TJ > 90°C, IOS may exceed 1.5 nA for VCM = V−. With TJ = 125°C and V− ≤ VCM ≤ V− + 0.1 V, IOS ≤ 5 nA.
(3) This defines operation in floating applications such as the bootstrapped regulator or two-wire transmitter. Output is connected to the V+ terminal of the IC and input common mode is referred to V− (see System Examples). Effect of larger output-voltage swings with higher load resistance can be accounted for by adding the positive-supply rejection error.

6.8 Typical Characteristics

6.8.1 Typical Characteristics (Op Amp)

LM10 00565218.png
Figure 1. Input Current
LM10 00565220.png
Figure 3. Output Voltage Drift
LM10 00565222.png
Figure 5. DC Voltage Gain
LM10 00565224.png
Figure 7. Output Saturation Characteristics
LM10 00565226.png
Figure 9. Output Saturation Characteristics
LM10 00565228.png
Figure 11. Minimum Supply Voltage
LM10 00565231.png
Figure 13. Output Impedance
LM10 00565233.png
Figure 15. Large Signal Response
LM10 00565235.png
Figure 17. Comparator Response Time For Various Input Overdrives
LM10 00565237.png
Figure 19. Noise Rejection
LM10 00565239.png
Figure 21. Supply Current
LM10 00565241.png
Figure 23. Thermal Gradient Cross-Coupling
LM10 00565243.png
Figure 25. Shunt Gain
LM10 00565242.png
Figure 27. Shunt Gain
LM10 00565244.png
Figure 29. Shunt Gain
LM10 00565219.png
Figure 2. Common-Mode Limits
LM10 00565221.png
Figure 4. Input Noise Voltage
LM10 00565223.png
Figure 6. Transconductance
LM10 00565225.png
Figure 8. Output Saturation Characteristics
LM10 00565227.png
Figure 10. Minimum Supply Voltage
LM10 00565229.png
Figure 12. Minimum Supply Voltage
LM10 00565232.png
Figure 14. Typical Stability Range
LM10 00565234.png
Figure 16. Comparator Response Time For Various Input Overdrives
LM10 00565236.png
Figure 18. Follower Pulse Response
LM10 00565238.png
Figure 20. Rejection Slew Limiting
LM10 00565240.png
Figure 22. Thermal Gradient Feedback
LM10 00565242.png
Figure 24. Shunt Gain
LM10 00565244.png
Figure 26. Shunt Gain
LM10 00565243.png
Figure 28. Shunt Gain

6.8.2 Typical Characteristics (Reference)

LM10 00565245.png
Figure 30. Line Regulation
LM10 00565247.png
Figure 32. Reference Noise Voltage
LM10 00565249.png
Figure 34. Output Saturation
LM10 00565246.png
Figure 31. Load Regulation
LM10 00565248.png
Figure 33. Minimum Supply Voltage
LM10 00565250.png
Figure 35. Typical Stability Range