SNVS739F December   2011  – October 2016 LM10504

PRODUCTION DATA.  

  1. 1 Features
  2. 2 Applications
  3. 3 Description
  4. 4 Revision History
  5. 5 Pin Configuration and Functions
  6. 6 Specifications
    1. 6.1  Absolute Maximum Ratings
    2. 6.2  ESD Ratings
    3. 6.3  Recommended Operating Conditions
    4. 6.4  Thermal Information
    5. 6.5  Electrical Characteristics - General
    6. 6.6  Electrical Characteristics - Buck 1
    7. 6.7  Electrical Characteristics - Buck 2
    8. 6.8  Electrical Characteristics - Buck 3
    9. 6.9  Electrical Characteristics - LDO
    10. 6.10 Electrical Characteristics - Comparators
    11. 6.11 Typical Characteristics
  7. 7 Detailed Description
    1. 7.1 Overview
    2. 7.2 Functional Block Diagram
    3. 7.3 Feature Description
      1. 7.3.1 Buck Regulators Description
      2. 7.3.2 PWM Operation
      3. 7.3.3 PFM Operation
      4. 7.3.4 Soft Start
      5. 7.3.5 Current Limiting
      6. 7.3.6 Internal Synchronous Rectification
      7. 7.3.7 Bypass-FET Operation on Buck 1 and Buck 2
      8. 7.3.8 Low Dropout Operation
      9. 7.3.9 Out of Regulation
    4. 7.4 Device Functional Modes
      1. 7.4.1  Start-Up Sequence
      2. 7.4.2  Power-On Default and Device Enable
      3. 7.4.3  Reset Pin Function
      4. 7.4.4  DevSLP Function
        1. 7.4.4.1 DevSLP Pin
        2. 7.4.4.2 DevSLP Programming Through SPI
        3. 7.4.4.3 DevSLP Operational Constraints
      5. 7.4.5  Vselect_B2, Vselect_B3 Function
      6. 7.4.6  Undervoltage Lockout (UVLO)
      7. 7.4.7  Overvoltage Lockout (OVLO)
      8. 7.4.8  Device Status, Interrupt Enable
      9. 7.4.9  Thermal Shutdown (TSD)
      10. 7.4.10 Comparator
    5. 7.5 Programming
    6. 7.6 Register Maps
  8. 8 Application and Implementation
    1. 8.1 Application Information
    2. 8.2 Typical Application
      1. 8.2.1 Design Requirements
      2. 8.2.2 Detailed Design Procedure
        1. 8.2.2.1 External Components Selection
          1. 8.2.2.1.1 Output Inductors and Capacitors Selection
          2. 8.2.2.1.2 Inductor Selection
            1. 8.2.2.1.2.1 Recommended Method for Inductor Selection
            2. 8.2.2.1.2.2 Alternate Method for Inductor Selection
              1. 8.2.2.1.2.2.1 Suggested Inductors and Their Suppliers
          3. 8.2.2.1.3 Output and Input Capacitors Characteristics
            1. 8.2.2.1.3.1 Output Capacitor Selection
            2. 8.2.2.1.3.2 Input Capacitor Selection
        2. 8.2.2.2 Recommendations For Unused Functions and Pins
      3. 8.2.3 Application Curves
  9. 9 Power Supply Recommendations
  10. 10Layout
    1. 10.1 Layout Guidelines
      1. 10.1.1 PCB Layout Thermal Dissipation For DSGBA Package
    2. 10.2 Layout Example
  11. 11Device and Documentation Support
    1. 11.1 Device Support
      1. 11.1.1 Third-Party Products Disclaimer
    2. 11.2 Receiving Notification of Documentation Updates
    3. 11.3 Community Resources
    4. 11.4 Trademarks
    5. 11.5 Electrostatic Discharge Caution
    6. 11.6 Glossary
  12. 12Mechanical, Packaging, and Orderable Information

パッケージ・オプション

メカニカル・データ（パッケージ｜ピン）
サーマルパッド・メカニカル・データ
発注情報

4 Revision History

Changes from E Revision (March 2013) to F Revision

  • Added ESD Ratings table, Feature Description section, Device Functional Modes, Application and Implementation section, Power Supply Recommendations section, Layout section, Device and Documentation Support section, and Mechanical, Packaging, and Orderable Information sectionGo
  • Changed RθJA value in the Thermal Information table From: 44.5 To: 65.5Go

Changes from D Revision (March 2013) to E Revision

  • Changed layout of National Semiconductor Data Sheet to TI formatGo