JAJSAH1E December 2005 – May 2016 LM25010 , LM25010-Q1
PRODUCTION DATA.
NOTE
Information in the following applications sections is not part of the TI component specification, and TI does not warrant its accuracy or completeness. TI’s customers are responsible for determining suitability of components for their purposes. Customers should validate and test their design implementation to confirm system functionality.
The LM25010 is a non-synchronous buck regulator converter designed to operate over a wide input voltage and output current range. Spreadsheet-based calculator tools, available on the TI product website at Quick-Start Calculator, can be used to design a single output non-synchronous buck converter.
Alternatively, online WEBENCH® software is available to create a complete buck design and generate the bill of materials, estimated efficiency, solution size, and cost of the complete solution.
The final circuit is shown in Figure 11, and its performance is shown in Figure 16 and Figure 17. Current limit measured approximately 1.3 A.
Table 1 lists the operating parameters for Figure 11.
PARAMETER | EXAMPLE VALUE |
---|---|
Input voltage | 6 V to 40 V |
Output voltage | 5 V |
Load current | 200 mA to 1 A |
Soft-start time | 5 ms |
The procedure for calculating the external components is illustrated with a design example. Configure the circuit in Figure 11 according to the components listed in Table 2.
ITEM | DESCRIPTION | VALUE |
---|---|---|
C1 | Ceramic capacitor | (2) 2.2 µF, 50 V |
C2 | Ceramic capacitor | 22 µF, 16 V |
C3 | Ceramic capacitor | 0.47 µF, 16 V |
C4, C6 | Ceramic capacitor | 0.022 µF, 16 V |
C5 | Ceramic capacitor | 0.1 µF, 50 V |
D1 | Schottky diode | 60 V, 2 A |
L1 | Inductor | 100 µH |
R1 | Resistor | 1 kΩ |
R2 | Resistor | 1 kΩ |
R3 | Resistor | 1.5 Ω |
RON | Resistor | 200 kΩ |
U1 | LM25010 | — |
These resistors set the output voltage, and calculate the ratio with Equation 10.
R1/R2 calculates to 1. The resistors should be chosen from standard value resistors in the range of 1 kΩ to 10 kΩ. A value of 1 kΩ is used for R1 and R2.
RON can be chosen using Equation 7 to set the nominal frequency, or from Equation 6 if the ON-time at a particular VIN is important. A higher frequency generally means a smaller inductor and capacitors (value, size and cost), but higher switching losses. A lower frequency means a higher efficiency, but with larger components. Generally, if PC board space is tight, a higher frequency is better. The resulting ON-time and frequency have a ±25% tolerance. Using Equation 7 at a nominal VIN of 8 V in Equation 11.
A value of 200 kΩ will be used for RON, yielding a nominal frequency of 161 kHz at VIN = 6 V, and 203 kHz at
VIN = 40 V.
The inductor value is determined based on the load current, ripple current, and the minimum and maximum input voltage (VIN(min), VIN(max)). See Figure 12.
To keep the circuit in continuous conduction mode, the maximum allowed ripple current is twice the minimum load current, or 400 mAP-P. Using this value of ripple current, the inductor (L1) is calculated using Equation 12 and Equation 13.
where
Equation 13 provides the minimum value for inductor L1. When selecting an inductor, use a higher standard value (100 uH). To prevent saturation, and possible destructive current levels, L1 must be rated for the peak current which occurs if the current limit and maximum ripple current are reached simultaneously (IPK in Figure 9). The maximum ripple amplitude is calculated by rearranging Equation 12 using VIN(max), FS(min), and the minimum inductor value, based on the manufacturer’s tolerance. Assume, for Equation 14, Equation 15, and Equation 16, the inductor’s tolerance is ±20%.
where
At the nominal maximum load current of 1 A, the peak inductor current is 1.18 A.
Since it is obvious that the lower peak of the inductor current waveform does not exceed 1 A at maximum load current (see Figure 12), it is not necessary to increase the current limit threshold. Therefore RCL is not needed for this exercise. For applications where the lower peak exceeds 1 A, see Increasing The Current Limit Threshold.
Since the LM25010 requires a minimum of 25 mVP-P of ripple at the FB pin for proper operation, the required ripple at VOUT is increased by R1 and R2, and is equal to Equation 17.
This necessary ripple voltage is created by the inductor ripple current acting on C2’s ESR + R3. First, determine the minimum ripple current, which occurs at minimum VIN, maximum inductor value, and maximum frequency with Equation 18.
The minimum ESR for C2 is then equal to Equation 19.
If the capacitor used for C2 does not have sufficient ESR, R3 is added in series as shown in the Functional Block Diagram. The value chosen for C2 is application dependent, and it is recommended that it be no smaller than 3.3 µF. C2 affects the ripple at VOUT, and transient response. Experimentation is usually necessary to determine the optimum value for C2.
A Schottky diode is recommended. Ultra-fast recovery diodes are not recommended as the high speed transitions at the SW pin may inadvertently affect the IC’s operation through external or internal EMI. The diode should be rated for the maximum VIN (40 V), the maximum load current (1 A), and the peak current which occurs when current limit and maximum ripple current are reached simultaneously (IPK in Figure 9), previously calculated to be 1.86 A. The diode’s forward voltage drop affects efficiency due to the power dissipated during the OFF-time. The average power dissipation in D1 is calculated from Equation 20.
where
This capacitor limits the ripple voltage at VIN resulting from the source impedance of the supply feeding this circuit, and the on/off nature of the switch current into VIN. At maximum load current, when the buck switch turns on, the current into VIN steps up from zero to the lower peak of the inductor current waveform (IPK- in Figure 12), ramps up to the peak value (IPK+), then drops to zero at turnoff. The average current into VIN during this ON-time is the load current. For a worst case calculation, C1 must supply this average current during the maximum ON-time. The maximum ON-time is calculated at VIN = 6 V using Equation 5, with a 25% tolerance added to Equation 21.
The voltage at VIN should not be allowed to drop below 5.5 V in order to maintain VCC above its UVLO in Equation 22.
Normally a lower value can be used for C1 since the above calculation is a worst case calculation which assumes the power source has a high source impedance. A quality ceramic capacitor with a low ESR should be used for C1.
The capacitor at the VCC pin provides noise filtering and stability, prevents false triggering of the VCC UVLO at the buck switch ON and OFF transitions, and limits the peak voltage at VCC when a high voltage with a short rise time is initially applied at VIN. C3 should be no smaller than 0.47 µF, and must be a good quality, low ESR, ceramic capacitor, physically close to the IC pins.
The recommended value for C4 is 0.022 µF. TI recommends a high quality ceramic capacitor with low ESR as C4 supplies the surge current to charge the buck switch gate at each turnon. A low ESR also ensures a complete recharge during each OFF-time.
This capacitor suppresses transients and ringing due to lead inductance at VIN. TI recommends a low ESR, 0.1-µF ceramic chip capacitor placed physically close to the LM25010.
The capacitor at the SS pin determines the softstart time (that is the time for the reference voltage at the regulation comparator and the output voltage) to reach their final value. Determine the capacitor value with Equation 23.
For a 5 ms softstart time, C6 calculates to 0.022 µF.
The current limit threshold is nominally 1.25 A, with a minimum guaranteed value of 1 A. If, at maximum load current, the lower peak of the inductor current (IPK– in Figure 12) exceeds 1 A, resistor RCL must be added between SGND and ISEN to increase the current limit threshold to be equal or exceed that lower peak current. This resistor diverts some of the recirculating current from the internal sense resistor so that a higher current level is needed to switch the internal current limit comparator. Calculate IPK– with Equation 24.
where
RCL is calculated with Equation 25.
where
The next smaller standard value resistor should be used for RCL. With the addition of RCL it is necessary to check the average and peak current values to ensure they do not exceed the LM25010 limits. At maximum load current the average current through the internal sense resistor is calculated with Equation 26.
If IAVE is less than 2 A, no changes are necessary. If it exceeds 2 A, RCL must be reduced. The upper peak of the inductor current (IPK+), at maximum load current, is calculated using Equation 27.
where
If IPK+ exceeds 3.5 A , the inductor value must be increased to reduce the ripple amplitude. This necessitates recalculation of IOR(min), IPK–, and RCL.
When the circuit is in current limit, the upper peak current out of the SW pin is calculated with Equation 28.
The inductor L1 and diode D1 must be rated for this current.
For applications where low output voltage ripple is required the output can be taken directly from the low ESR output capacitor (C2) as shown in Figure 13. However, R3 slightly degrades the load regulation. The specific component values, and the application determine if this is suitable.
Where the circuit of Figure 13 is not suitable, the circuits of Figure 14 or Figure 15 can be used.
In Figure 14, Cff is added across R1 to AC-couple the ripple at VOUT directly to the FB pin. This allows the ripple at VOUT to be reduced, in some cases considerably, by reducing R3. In the circuit of Figure 11, the ripple at VOUT ranged from 50 mVP-P at VIN = 6 V to 285 mVP-P at VIN = 40 V. By adding a 1000 pF capacitor at Cff and reducing R3 to 0.75 Ω, the VOUT ripple was reduced by 50%, ranging from 25 mVP-P to 142 mVP-P.
To reduce VOUT ripple further, the circuit of Figure 15 can be used. R3 has been removed, and the output ripple amplitude is determined by C2’s ESR and the inductor ripple current. RA and CA are chosen to generate a 40 mV to 50 mVP-P sawtooth at their junction, and that voltage is AC-coupled to the FB pin via CB. In selecting RA and CA, VOUT is considered a virtual ground as the SW pin switches between VIN and –1 V. Since the ON-time at SW varies inversely with VIN, the waveform amplitude at the RA and CA junction is relatively constant. R1 and R2 must typically be increased to more than 5 kΩ each to not significantly attenuate the signal provided to FB through CB. Typical values for the additional components are RA = 200 kΩ, CA = 680 pF, and CB = 0.01 µF.
A minimum load current of 1 mA is required to maintain proper operation. If the load current falls below that level, the bootstrap capacitor can discharge during the long OFF-time and the circuit either shuts down or cycles ON and OFF at a low frequency. If the load current is expected to drop below 1 mA in the application, choose the feedback resistors to be low enough in value to provide the minimum required current at nominal VOUT.