The LM25116 contains a high current, high-side driver and associated high-voltage level shift. This gate driver circuit works in conjunction with an external diode and bootstrap capacitor. A 1-µF ceramic capacitor, connected with short traces between the HB pin and SW pin, is recommended. During the off-time of the high-side MOSFET, the SW pin voltage is approximately –0.5 V and the bootstrap capacitor charges from VCC through the external bootstrap diode. When operating with a high PWM duty cycle, the buck switch is forced off each cycle for 450 ns to ensure that the bootstrap capacitor is recharged.

The LO and HO outputs are controlled with an adaptive deadtime methodology which insures that both outputs are never enabled at the same time. When the controller commands HO to be enabled, the adaptive block first disables LO and waits for the LO voltage to drop below approximately 25% of VCC. HO is then enabled after a small delay. Similarly, when HO turns off, LO waits until the SW voltage has fallen to ½ of VCC. LO is then enabled after a small delay. In the event that SW does not fall within approximately 150 ns, LO is asserted high. This methodology insures adequate dead-time for appropriately sized MOSFETs.

In some applications it may be desirable to slow down the high-side MOSFET turnon time to control switching spikes. This may be accomplished by adding a resistor is series with the HO output to the high-side gate. Values greater than 10 Ω must be avoided so as not to interfere with the adaptive gate drive. Use of an HB resistor for this function must be carefully evaluated so as not cause potentially harmful negative voltage to the high-side driver, and is generally limited to 2.2 Ω maximum.