JAJSVG8 October   2024 LM251772

PRODUCTION DATA  

  1.   1
  2. 1 特長
  3. 2 アプリケーション
  4. 3 概要
  5. 4 Device Comparison
  6. 5 Pin Configuration and Functions
  7. 6 Specifications
    1. 6.1 Absolute Maximum Ratings
    2. 6.2 Handling Ratings
    3. 6.3 Recommended Operating Conditions
    4. 6.4 Thermal Information
    5. 6.5 Electrical Characteristics
    6. 6.6 Timing Requirements
    7. 6.7 Typical Characteristics
  8. 7 Parameter Measurement Information
  9. 8 Detailed Description
    1. 8.1 Overview
    2. 8.2 Functional Block Diagram
    3. 8.3 Feature Description
      1. 8.3.1  Buck-Boost Control Scheme
        1. 8.3.1.1 Buck Mode
        2. 8.3.1.2 Boost Mode
        3. 8.3.1.3 Buck-Boost Mode
      2. 8.3.2  Power Save Mode
      3. 8.3.3  Reference System
        1. 8.3.3.1 VIO LDO and nRST-PIN
      4. 8.3.4  Supply Voltage Selection – VSMART Switch and Selection Logic
      5. 8.3.5  Enable and Undervoltage Lockout
        1. 8.3.5.1 UVLO
      6. 8.3.6  Internal VCC Regulators
        1. 8.3.6.1 VCC1 Regulator
        2. 8.3.6.2 VCC2 Regulator
      7. 8.3.7  Error Amplifier and Control
        1. 8.3.7.1 Output Voltage Regulation
        2. 8.3.7.2 Output Voltage Feedback
        3. 8.3.7.3 Voltage Regulation Loop
        4. 8.3.7.4 Dynamic Voltage Scaling
      8. 8.3.8  Output Voltage Discharge
      9. 8.3.9  Peak Current Sensor
      10. 8.3.10 Short Circuit - Hiccup Protection
      11. 8.3.11 Current Monitor/Limiter
        1. 8.3.11.1 Overview
        2. 8.3.11.2 Output Current Limitation
        3. 8.3.11.3 Output Current Monitor
      12. 8.3.12 Oscillator Frequency Selection
      13. 8.3.13 Frequency Synchronization
      14. 8.3.14 Output Voltage Tracking
        1. 8.3.14.1 Analog Voltage Tracking
        2. 8.3.14.2 Digital Voltage Tracking
      15. 8.3.15 Slope Compensation
      16. 8.3.16 Configurable Soft Start
      17. 8.3.17 Drive Pin
      18. 8.3.18 Dual Random Spread Spectrum – DRSS
      19. 8.3.19 Gate Driver
      20. 8.3.20 Cable Drop Compensation (CDC)
      21. 8.3.21 CFG-pin and R2D Interface
      22. 8.3.22 Advanced Monitoring Features
        1. 8.3.22.1  Overview
        2. 8.3.22.2  BUSY
        3. 8.3.22.3  OFF
        4. 8.3.22.4  VOUT
        5. 8.3.22.5  IOUT
        6. 8.3.22.6  INPUT
        7. 8.3.22.7  TEMPERATURE
        8. 8.3.22.8  CML
        9. 8.3.22.9  OTHER
        10. 8.3.22.10 ILIM_OP
        11. 8.3.22.11 nFLT/nINT Pin Output
        12. 8.3.22.12 Status Byte
      23. 8.3.23 Protection Features
        1. 8.3.23.1  Thermal Shutdown (TSD)
        2. 8.3.23.2  Over Current Protection
        3. 8.3.23.3  Output Over Voltage Protection 1 (OVP1)
        4. 8.3.23.4  Output Over Voltage Protection 2 (OVP2)
        5. 8.3.23.5  Input Voltage Protection (IVP)
        6. 8.3.23.6  Input Voltage Regulation (IVR)
        7. 8.3.23.7  Power Good
        8. 8.3.23.8  Boot-Strap Under Voltage Protection
        9. 8.3.23.9  Boot-strap Over Voltage Clamp
        10. 8.3.23.10 CRC - CHECK
    4. 8.4 Device Functional Modes
      1. 8.4.1 Overview
      2. 8.4.2 Logic State Description
    5. 8.5 Programming
      1. 8.5.1 I2C Bus Operation
      2. 8.5.2 Clock Stretching
      3. 8.5.3 Data Transfer Formats
      4. 8.5.4 Single READ from a Defined Register Address
      5. 8.5.5 Sequential READ Starting from a Defined Register Address
      6. 8.5.6 Single WRITE to a Defined Register Address
      7. 8.5.7 Sequential WRITE Starting at a Defined Register Address
  10. 9 LM251772 Registers
  11. 10Application and Implementation
    1. 10.1 Application Information
    2. 10.2 Typical Application
      1. 10.2.1 Design Requirements
      2. 10.2.2 Detailed Design Procedure
        1. 10.2.2.1  Custom Design with WEBENCH Tools
        2. 10.2.2.2  Frequency
        3. 10.2.2.3  Feedback Divider
        4. 10.2.2.4  Inductor and Current Sense Resistor Selection
        5. 10.2.2.5  Output Capacitor
        6. 10.2.2.6  Input Capacitor
        7. 10.2.2.7  Slope Compensation
        8. 10.2.2.8  UVLO Divider
        9. 10.2.2.9  Soft-Start Capacitor
        10. 10.2.2.10 MOSFETs QH1 and QL1
        11. 10.2.2.11 MOSFETs QH2 and QL2
        12. 10.2.2.12 Loop Compensation
        13. 10.2.2.13 External Component Selection
      3. 10.2.3 Application Curves
    3. 10.3 Wireless Charging Supply
    4. 10.4 USB-PD Source with Power Path
    5. 10.5 Parallel (Multiphase) Operation
  12. 11Device and Documentation Support
    1. 11.1 Documentation Support
      1. 11.1.1 Related Documentation
    2. 11.2 ドキュメントの更新通知を受け取る方法
    3. 11.3 サポート・リソース
    4. 11.4 Trademarks
    5. 11.5 静電気放電に関する注意事項
    6. 11.6 用語集
  13. 12Revision History
  14. 13Mechanical, Packaging, and Orderable Information

パッケージ・オプション

メカニカル・データ（パッケージ｜ピン）
サーマルパッド・メカニカル・データ
発注情報

6.7 Typical Characteristics

The following conditions apply (unless otherwise noted): TJ = 25°C; V(VCC2) = 5V

LM251772 Switching Frequency Versus RT ResistanceFigure 6-1 Switching Frequency Versus RT Resistance
LM251772 FB Pin Reference Voltage versus TemperatureFigure 6-3 FB Pin Reference Voltage versus Temperature
LM251772 Shutdown Current into VIN versus Pin Voltage VEN/UVLO = 0V ,V(VIN) = 12V, V(BIAS) = 0VFigure 6-5 Shutdown Current into VIN versus Pin Voltage
VEN/UVLO = 0V ,V(VIN) = 12V, V(BIAS) = 0V
LM251772 Shutdown Current into BIAS versus Temperature VEN/UVLO = 0V ,V(VIN) = 3.5V,V(BIAS) = 12VFigure 6-7 Shutdown Current into BIAS versus Temperature
VEN/UVLO = 0V ,V(VIN) = 3.5V,V(BIAS) = 12V
LM251772 Quiescent Current into BIAS versus Temperature V(BIAS) = 12V , V(VIN) = 3.5V Figure 6-9 Quiescent Current into BIAS versus Temperature
V(BIAS) = 12V , V(VIN) = 3.5V
LM251772 VCC2 LDO Output voltage versus VCC2 Load Current V(VIN) = 12V, V(BIAS) = 0VFigure 6-11 VCC2 LDO Output voltage versus VCC2 Load Current
V(VIN) = 12V, V(BIAS) = 0V
LM251772 VCC2 LDO Output voltage versus VIN Voltage V(BIAS) = 0VFigure 6-13 VCC2 LDO Output voltage versus VIN Voltage
V(BIAS) = 0V
LM251772 Soft-Start current versus Temperature Figure 6-15 Soft-Start current versus Temperature
LM251772 Hysteresis Current on EN/UVLO versus Temperature Figure 6-17 Hysteresis Current on EN/UVLO versus Temperature
LM251772 Buck Minimum On-time versus Switching FrequencyFigure 6-19 Buck Minimum On-time versus Switching Frequency
LM251772 Boost Minimum On-time versus Switching FrequencyFigure 6-21 Boost Minimum On-time versus Switching Frequency
LM251772 Gate Driver Transition (Dead) Time versus Switching Frequency SEL_MIN_DEADTIME_GDRV = 0b01,SEL_SCALE_DT = 0b1, EN_CONST_TDEAD = 0b0Figure 6-23 Gate Driver Transition (Dead) Time versus Switching Frequency
SEL_MIN_DEADTIME_GDRV = 0b01,SEL_SCALE_DT = 0b1, EN_CONST_TDEAD = 0b0
LM251772 Peak Current Limit Threshold Voltage Versus TemperatureFigure 6-25 Peak Current Limit Threshold Voltage Versus Temperature
LM251772 CSB Input Current versus Temperature Figure 6-27 CSB Input Current versus Temperature
LM251772 Average Current Limit Threshold Voltage Versus Temperature ILIM_THRESHOLD = 0x3CFigure 6-29 Average Current Limit Threshold Voltage Versus Temperature
ILIM_THRESHOLD = 0x3C
LM251772 Switching Frequency versus Temperature R(RT) = 75KΩ Figure 6-2 Switching Frequency versus Temperature
R(RT) = 75KΩ
LM251772 FB Pin Reference Voltage versus VO Register DAC-CodeFigure 6-4 FB Pin Reference Voltage versus VO Register DAC-Code
Figure 6-6 Shutdown Current into VIN versus Temperature
VEN/UVLO = 0V ,V(VIN) = 12V,V(BIAS) = 0VLM251772
LM251772 Quiescent Current into BIAS versus BIAS pin voltage V(VIN) = 3.5V Figure 6-8 Quiescent Current into BIAS versus BIAS pin voltage
V(VIN) = 3.5V
LM251772 Standby Current into BIAS versus Temperature V(VIN) = 3.5V V(VIN) = 12V Figure 6-10 Standby Current into BIAS versus Temperature
V(VIN) = 3.5V V(VIN) = 12V
LM251772 VCC2 LDO Output voltage versus VCC2 Load Current V(VIN) = 3.5V, V(BIAS) = 12VFigure 6-12 VCC2 LDO Output voltage versus VCC2 Load Current
V(VIN) = 3.5V, V(BIAS) = 12V
LM251772 VCC2 LDO Output voltage versus BIAS Voltage V(VIN) = 2.5VFigure 6-14 VCC2 LDO Output voltage versus BIAS Voltage
V(VIN) = 2.5V
LM251772 EN/UVLO Threshold versus Temperature Figure 6-16 EN/UVLO Threshold versus Temperature
LM251772 Buck Minimum Off-time versus Switching Frequency Figure 6-18 Buck Minimum Off-time versus Switching Frequency
LM251772 Boost Minimum Off-time versus Switching FrequencyFigure 6-20 Boost Minimum Off-time versus Switching Frequency
LM251772 Buck Minimum Duty -cycle for PSM Operation versus Switching Frequency (SYNC_OUT = Enabled)Figure 6-22 Buck Minimum Duty -cycle for PSM Operation versus Switching Frequency (SYNC_OUT = Enabled)
LM251772 Gate Driver Transition (Dead) Time versus Switching Frequency f(sw) = 100kHz ,SEL_MIN_DEADTIME_GDRV = 0b01, EN_CONST_TDEAD = 0b0, Turn Low-Side off, Turn High-Side onFigure 6-24 Gate Driver Transition (Dead) Time versus Switching Frequency
f(sw) = 100kHz ,SEL_MIN_DEADTIME_GDRV = 0b01, EN_CONST_TDEAD = 0b0, Turn Low-Side off, Turn High-Side on
LM251772 CSA Input Current versus TemperatureFigure 6-26 CSA Input Current versus Temperature
LM251772 Average Current Limit Threshold Voltage Versus Temperature ILIM_THRESHOLD = 0x64Figure 6-28 Average Current Limit Threshold Voltage Versus Temperature
ILIM_THRESHOLD = 0x64
LM251772 Average Current Limit Threshold Voltage Versus Temperature ILIM_THRESHOLD = 0x14Figure 6-30 Average Current Limit Threshold Voltage Versus Temperature
ILIM_THRESHOLD = 0x14