JAJSDZ5 October   2017 LM2623-Q1

PRODUCTION DATA.  

  1. 1 特長
  2. 2 アプリケーション
  3. 3 概要
    1.     Device Images
      1.      代表的なアプリケーション
  4. 4 改訂履歴
  5. 5 Pin Configuration and Functions
    1.     Pin Functions
  6. 6 Specifications
    1. 6.1 Absolute Maximum Ratings
    2. 6.2 ESD Ratings
    3. 6.3 Recommended Operating Conditions
    4. 6.4 Thermal Information
    5. 6.5 Electrical Characteristics
    6. 6.6 Typical Characteristics
  7. 7 Detailed Description
    1. 7.1 Overview
    2. 7.2 Functional Block Diagram
    3. 7.3 Feature Description
      1. 7.3.1 Gated Oscillator Control Scheme
      2. 7.3.2 Cycle-To-Cycle PFM
      3. 7.3.3 Shutdown
      4. 7.3.4 Internal Current Limit and Thermal Protection
    4. 7.4 Device Functional Modes
      1. 7.4.1 Pulse Frequency Modulation (PFM)
      2. 7.4.2 Low Voltage Start-Up
  8. 8 Applications and Implementation
    1. 8.1 Application Information
    2. 8.2 Typical Application
      1. 8.2.1 Design Requirements
      2. 8.2.2 Detailed Design Procedure
        1. 8.2.2.1 Non-Linear Effect
        2. 8.2.2.2 Choosing the Correct C3 Capacitor
        3. 8.2.2.3 Setting the Output Voltage
        4. 8.2.2.4 VDD Supply
        5. 8.2.2.5 Setting the Switching Frequency
        6. 8.2.2.6 Output Diode Selection
      3. 8.2.3 Application Curves
  9. 9 Power Supply Recommendations
  10. 10Layout
    1. 10.1 Layout Guidelines
      1. 10.1.1 Boost Output Capacitor Placement
      2. 10.1.2 Schottky Diode Placement
      3. 10.1.3 Boost Input / VDD Capacitor Placement
    2. 10.2 Layout Example
    3. 10.3 WSON Package Devices
  11. 11デバイスおよびドキュメントのサポート
    1. 11.1 デバイス・サポート
      1. 11.1.1 デベロッパー・ネットワークの製品に関する免責事項
    2. 11.2 ドキュメントのサポート
      1. 11.2.1 関連資料
    3. 11.3 ドキュメントの更新通知を受け取る方法
    4. 11.4 コミュニティ・リソース
    5. 11.5 商標
    6. 11.6 静電気放電に関する注意事項
    7. 11.7 Glossary
  12. 12メカニカル、パッケージ、および注文情報

パッケージ・オプション

メカニカル・データ（パッケージ｜ピン）
サーマルパッド・メカニカル・データ
発注情報

6.5 Electrical Characteristics

Limits apply for TJ = 25°C and VDD = VOUT = 3.3 V, unless otherwise specified.
PARAMETERTEST CONDITIONSMINTYPMAXUNIT
GENERAL
VDD_ST Start-up supply voltage 25°C ILOAD = 0 mA(1) 1.1 V
VIN_OP Minimum operating supply voltage (once started) ILOAD = 0 mA 0.65 0.9 V
VFB FB pin voltage 1.24 V
–40°C to 85°C 1.2028 1.2772
–40°C to 125°C 1.2028 1.2772
VOUT_MAX Maximum output voltage 14 V
η Efficiency VIN = 3.6 V; VOUT = 5 V, ILOAD = 500 mA 87%
VIN = 2.5 V; VOUT = 3.3 V, ILOAD = 200 mA 87%
D Switch duty cycle 17%
IDD Operating quiescent current(2) FB pin > 1.3 V, EN pin at VDD 80 µA
FB pin > 1.3 V, EN pin at VDD , –40°C to 85°C 110
FB pin > 1.3 V, EN pin at VDD, –40°C to 125°C 110
ISD Shutdown quiescent current(3) VDD, BOOT, and SW pins at 5 V, EN pin < 200 mV 0.01 µA
VDD, BOOT, and SW pins at 5 V, EN pin < 200 mV, –40°C to 85°C 2.5
VDD, BOOT, and SW pins at 5 V, EN pin < 200 mV, –40°C to 125°C 2.5
ICL Switch peak current limit 2.2 2.85 A
RDSON MOSFET switch on resistance 0.17 Ω
 –40°C to 85°C 0.26
–40°C to 125° 0.26
ENABLE SECTION
VEN_LO EN pin voltage low(4) –40°C to 85°C 0.15 VDD V
–40°C to 125°C 0.15 VDD
VEN_HI EN pin voltage high(4) –40°C to 85°C 0.7 VDD V
–40°C to 125°C 0.7 VDD
(1) VDD tied to BOOT and EN pins. Frequency pin tied to VDD through 121-KΩ resistor. VDD_ST = VDD when start-up occurs. VIN is VDD + D1 voltage (usually 10 mV to 50 mV at start-up).
(2) This is the current into the VDD pin.
(3) This is the total current into pins VDD, BOOT, SW, and FREQ.
(4) When the EN pin is below VEN_LO, the regulator is shut down; when it is above VEN_HI, the regulator is operating.