Table 1. Bill of Materials

8.2.1.2.1 Inductor Selection

The Duty Cycle (D) can be approximated quickly using the ratio of output voltage (V_O) to input voltage (V_IN):

Equation 1.

The catch diode (D1) forward voltage drop and the voltage drop across the internal PMOS must be included to calculate a more accurate duty cycle. Calculate D by using the following formula:

Equation 2.

V_SW can be approximated by:

The diode forward drop (V_D) can range from 0.3 V to 0.7 V depending on the quality of the diode. The lower the V_D, the higher the operating efficiency of the converter. The inductor value determines the output ripple current. Lower inductor values decrease the size of the inductor, but increase the output ripple current. An increase in the inductor value will decrease the output ripple current.

One must ensure that the minimum current limit (1.2 A) is not exceeded, so the peak current in the inductor must be calculated. The peak current (I_LPK) in the inductor is calculated by:

Figure 20. Inductor Current

Equation 5.

In general,

If Δi_L = 20% of 1 A, the peak current in the inductor will be 1.2 A. The minimum ensured current limit over all operating conditions is 1.2 A. One can either reduce Δi_L, or make the engineering judgment that zero margin will be safe enough. The typical current limit is 1.75 A.

The LM2830 device operates at frequencies allowing the use of ceramic output capacitors without compromising transient response. Ceramic capacitors allow higher inductor ripple without significantly increasing output ripple. See the Output Capacitor for more details on calculating output voltage ripple. Now that the ripple current is determined, the inductance is calculated by:

Equation 7.

where

• T_s = 1/f_s

When selecting an inductor, make sure that it is capable of supporting the peak output current without saturating. Inductor saturation will result in a sudden reduction in inductance and prevent the regulator from operating correctly. Because of the speed of the internal current limit, it is necessary to specify the peak current of the inductor only required maximum output current. For example, if the designed maximum output current is 1.0 A and the peak current is 1.25 A, then the inductor should be specified with a saturation current limit of > 1.25 A. There is no need to specify the saturation or peak current of the inductor at the 1.75-A typical switch current limit. The difference in inductor size is a factor of 5. Because of the operating frequency of the LM2830 device, ferrite based inductors are preferred to minimize core losses. This presents little restriction because the variety of ferrite-based inductors is huge. Lastly, inductors with lower series resistance (R_DCR) will provide better operating efficiency.

8.2.1.2.2 Input Capacitor

An input capacitor is necessary to ensure that V_IN does not drop excessively during switching transients. The primary specifications of the input capacitor are capacitance, voltage, RMS current rating, and ESL (Equivalent Series Inductance). The recommended input capacitance is 22 µF. The input voltage rating is specifically stated by the capacitor manufacturer. Make sure to check any recommended deratings and also verify if there is any significant change in capacitance at the operating input voltage and the operating temperature. The input capacitor maximum RMS input current rating (I_RMS-IN) must be greater than:

Equation 8.

Neglecting inductor ripple simplifies the above equation to:

Equation 9.

From Equation 9, it can be shown that maximum RMS capacitor current occurs when D = 0.5. Always calculate the RMS at the point where the duty cycle D is closest to 0.5. The ESL of an input capacitor is usually determined by the effective cross sectional area of the current path. A large leaded capacitor will have high ESL and a 0805 ceramic chip capacitor will have very low ESL. At the operating frequencies of the LM2830 device, leaded capacitors may have an ESL so large that the resulting impedance (2πfL) will be higher than that required to provide stable operation. As a result, surface-mount capacitors are strongly recommended.

Sanyo POSCAP, Tantalum or Niobium, Panasonic SP, and multilayer ceramic capacitors (MLCC) are all good choices for both input and output capacitors and have very low ESL. For MLCCs it is recommended to use X7R or X5R type capacitors due to their tolerance and temperature characteristics. Consult the capacitor manufacturer data sheets to see how rated capacitance varies over operating conditions.

8.2.1.2.3 Output Capacitor

The output capacitor is selected based upon the desired output ripple and transient response. The initial current of a load transient is provided mainly by the output capacitor. The output ripple of the converter is:

Equation 10.

When using MLCCs, the ESR is typically so low that the capacitive ripple may dominate. When this occurs, the output ripple will be approximately sinusoidal and 90° phase shifted from the switching action. Given the availability and quality of MLCCs and the expected output voltage of designs using the LM2830 device, there is really no need to review any other capacitor technologies. Another benefit of ceramic capacitors is their ability to bypass high frequency noise. A certain amount of switching edge noise will couple through parasitic capacitances in the inductor to the output. A ceramic capacitor will bypass this noise while a tantalum will not. Because the output capacitor is one of the two external components that control the stability of the regulator control loop, most applications will require a minimum of 22 µF of output capacitance. Capacitance often, but not always, can be increased significantly with little detriment to the regulator stability. Like the input capacitor, recommended multilayer ceramic capacitors are X7R or X5R types.

8.2.1.2.4 Catch Diode

The catch diode (D1) conducts during the switch off-time. A Schottky diode is recommended for its fast switching times and low forward voltage drop. The catch diode should be chosen so that its current rating is greater than:

The reverse breakdown rating of the diode must be at least the maximum input voltage plus appropriate margin. To improve efficiency, choose a Schottky diode with a low forward voltage drop.

8.2.1.2.5 Output Voltage

The output voltage is set using Equation 12, where R2 is connected between the FB pin and GND, and R1 is connected between V_O and the FB pin. A good value for R2 is 10 kΩ. When designing a unity gain converter (Vo = 0.6 V), R1 should be between 0 Ω and 100 Ω, and R2 should be equal or greater than 10 kΩ.

Equation 12.

8.2.1.2.6 Calculating Efficiency, and Junction Temperature

The complete LM2830 DC-DC converter efficiency can be calculated in the following manner.

Equation 14.

Or

Equation 15.

Calculations for determining the most significant power losses are shown below. Other losses totaling less than 2% are not discussed.

Power loss (P_LOSS) is the sum of two basic types of losses in the converter: switching and conduction. Conduction losses usually dominate at higher output loads, whereas switching losses remain relatively fixed and dominate at lower output loads. The first step in determining the losses is to calculate the duty cycle (D):

Equation 16.

V_SW is the voltage drop across the internal PFET when it is on, and is equal to: 

V_D is the forward voltage drop across the Schottky catch diode. It can be obtained from the diode manufacturer's Electrical Characteristics section. If the voltage drop across the inductor (V_DCR) is accounted for, the equation becomes:

Equation 18.

The conduction losses in the free-wheeling Schottky diode are calculated as follows: 

Often this is the single most significant power loss in the circuit. Care should be taken to choose a Schottky diode that has a low forward voltage drop.

Another significant external power loss is the conduction loss in the output inductor. The equation can be simplified to:

The conduction loss of the LC2830 device is mainly associated with the internal PFET:

Equation 21.

If the inductor ripple current is fairly small, the conduction losses can be simplified to:

Switching losses are also associated with the internal PFET. They occur during the switch on and off transition periods, where voltages and currents overlap resulting in power loss. The simplest means to determine this loss is to empirically measuring the rise and fall times (10% to 90%) of the switch at the switch node.

Switching Power Loss is calculated as follows:

Another loss is the power required for operation of the internal circuitry:

I_Q is the quiescent operating current, and is typically around 3.3 mA for the 1.6-MHz frequency option.

Table 2 lists typical application power losses.