JAJSAY1E March   2008  – October 2017 LM2854

PRODUCTION DATA.  

  1. 1 特長
  2. 2 アプリケーション
  3. 3 概要
    1.     Device Images
      1.      代表的なアプリケーション回路
  4. 4 改訂履歴
  5. 5 Pin Configuration and Functions
    1.     Pin Functions
  6. 6 Specifications
    1. 6.1 Absolute Maximum Ratings
    2. 6.2 ESD Ratings
    3. 6.3 Recommended Operating Conditions
    4. 6.4 Thermal Information
    5. 6.5 Electrical Characteristics
    6. 6.6 Typical Characteristics
  7. 7 Detailed Description
    1. 7.1 Overview
    2. 7.2 Functional Block Diagram
    3. 7.3 Feature Description
      1. 7.3.1  Switching Frequency
      2. 7.3.2  Enable
      3. 7.3.3  Soft-Start
      4. 7.3.4  Tracking
      5. 7.3.5  Pre-Biased Start-up Capability
      6. 7.3.6  Feedback Voltage Accuracy
      7. 7.3.7  Positive Current Limit
      8. 7.3.8  Negative Current Limit
      9. 7.3.9  Overtemperature Protection
      10. 7.3.10 Loop Compensation
    4. 7.4 Device Functional Modes
      1. 7.4.1 Shutdown Mode
      2. 7.4.2 Soft-Start and Track Mode
      3. 7.4.3 Normal Operating Mode
  8. 8 Application and Implementation
    1. 8.1 Application Information
    2. 8.2 Typical Application
      1. 8.2.1 Design Requirements
      2. 8.2.2 Detailed Design Procedure
        1. 8.2.2.1 Input Filter Capacitor
        2. 8.2.2.2 AVIN Filtering Components
        3. 8.2.2.3 Soft-Start Capacitor
        4. 8.2.2.4 Tracking - Equal Soft-Start Time
        5. 8.2.2.5 Tracking - Equal Slew Rates
        6. 8.2.2.6 Enable and UVLO
        7. 8.2.2.7 Output Voltage Setting
        8. 8.2.2.8 Compensation Component Selection
        9. 8.2.2.9 Filter Inductor and Output Capacitor Selection
      3. 8.2.3 Application Curves
      4. 8.2.4 System Examples
  9. 9 Power Supply Recommendations
  10. 10Layout
    1. 10.1 Layout Guidelines
    2. 10.2 Layout Example
  11. 11デバイスおよびドキュメントのサポート
    1. 11.1 ドキュメントのサポート
      1. 11.1.1 関連資料
    2. 11.2 商標
    3. 11.3 静電気放電に関する注意事項
    4. 11.4 Glossary
  12. 12メカニカル、パッケージ、および注文情報

パッケージ・オプション

メカニカル・データ（パッケージ｜ピン）
サーマルパッド・メカニカル・データ
発注情報

8.2.2.6 Enable and UVLO

Using a resistor divider from VIN to EN as shown in the schematic diagram below, the input voltage at which the part begins switching can be increased above the normal input UVLO level as shown in Equation 10.

Equation 10. LM2854 30052843.gif

For example, suppose that the required input UVLO level is 3.69 V. Choosing REN2 = 10 kΩ, then we calculate REN1 = 20 kΩ.

LM2854 30052844.gifFigure 19. Simplified Schematic Showing Use of EN as an Input UVLO

Alternatively, the EN pin can be driven from another voltage source to cater for system sequencing requirements commonly found in FPGA and other multi-rail applications. The following schematic shows an LM2854 that is sequenced to start based on the voltage level of a master system rail.

LM2854 30052845.gifFigure 20. Simplified Schematic Showing EN Used to Cascade Power Supply Start-up