CURRENT CONSUMPTION |
ISD |
Shutdown current |
EN = 0 |
|
1 |
4 |
µA |
IQ |
Quiescent current, device not switching |
EN = VIN, LCD bias boost disabled |
|
2 |
10 |
µA |
ILCD_EN |
|
LCD bias boost enabled, no-load |
|
0.5 |
|
mA |
DEVICE PROTECTION |
TSD |
Thermal shutdown |
|
|
140 |
|
°C |
BACKLIGHT LED CURRENT SINKS |
ILED_MAX |
Maximum output current in BLED1/2 |
2.7 V ≤ VIN ≤ 5 V, linear or exponential mode |
|
25 |
|
mA |
ILED_MIN |
Minimum output current in BLED1/2 |
2.7 V ≤ VIN ≤ 5 V, linear or exponential mode |
|
50 |
|
µA |
IACCU |
LED current accuracy(1) |
2.7 V ≤ VIN ≤ 5 V, 50 µA ≤ ILED ≤ 25 mA, linear or exponential mode |
-3% |
0.1% |
3% |
|
IMATCH |
LED1 to LED2 current matching(1) |
2.7 V ≤ VIN ≤ 5 V, 300 µA ≤ ILED ≤ 25 mA, linear or exponential mode |
-2% |
0.1% |
2% |
|
BACKLIGHT BOOST CONVERTER |
VOVP_BL |
Backlight boost output overvoltage protection |
2.7 V ≤ VIN ≤ 5 V, 29 V option |
28 |
28.75 |
29.5 |
V |
Efficiency |
Typical efficiency(2) |
ILED = 5 mA/string, VIN = 3.7 V (2 x 7 LEDs), (POUT/PIN) |
|
87% |
|
|
VHR |
Regulated current sink headroom voltage |
ILED = 25 mA |
|
250 |
|
mV |
ILED = 5 mA |
|
100 |
|
mV |
VHR_MIN |
Current sink minimum headroom voltage |
ILED = 95% of nominal, ILED = 5 mA |
|
30 |
|
mV |
RDSON |
NMOS switch on resistance |
ISW = 100 mA |
|
0.25 |
|
Ω |
ICL |
NMOS switch current limit |
2.7 V ≤ VIN ≤ 5 V |
900 |
1000 |
1100 |
mA |
ƒSW_BLBOOST |
Switching frequency |
2.7 V ≤ VIN ≤ 5 V |
500-kHz mode |
450 |
500 |
550 |
kHz |
1-MHz mode |
900 |
1000 |
1100 |
DMAX |
Maximum duty cycle |
|
|
94% |
|
|
LCM BIAS BOOST CONVERTER |
VOVP_LCM |
LCM bias boost output overvoltage protection |
2.7 V ≤ VIN ≤ 5 V |
|
7 |
|
V |
ƒSW_LCMBST |
Switching frequency (3) |
2.7 V ≤ VIN ≤ 5 V |
|
2500 |
|
kHz |
VLCM_OUT |
Bias boost output voltage range |
|
4.5 |
|
6.4 |
V |
Output voltage step size |
|
|
50 |
|
mV |
Peak-to-peak ripple voltage (3) |
ILOAD = 5 mA & 50 mA, CBST = 10 µF |
|
50 |
|
mVpp |
LCM_OUT line transient response (3) |
VIN + 500 mVp-p AC square wave, Tr = 100 mV/µs, 200 Hz, 12.5 % duty, ILOAD = 5 mA, CIN = 10 µF |
–50 |
±25 |
50 |
mV |
LCM_OUT load transient response (3) |
Load current step 0 mA to 100 mA, TRISE/FALL = 100 mA/µs, CIN = 10 µF |
–150 |
|
150 |
mV |
ICL_LCMBST |
Valley current limit |
|
|
1000 |
|
mA |
RDSON_LCMBST |
High-side MOSFET on resistance |
VIN = VGS = 5 V, TA = 25°C |
|
170 |
|
mΩ |
Low-side MOSFET on Resistance |
VIN = VGS = 5 V, TA = 25°C |
|
290 |
|
EFFLCMBST |
Efficiency (2) |
VLCM_OUT = 6 V, 5 mA < ILCMBST < 100 mA |
|
92% |
|
|
tST_LCMBST |
Start-up time (LCM_OUT), VLCM_OUT = 10% to 90% (3) |
CLCM_BST = 10 µF |
|
|
1000 |
µs |
DISPLAY BIAS POSITIVE OUTPUT (VPOS) |
VVPOS |
Programmable output voltage range |
|
4 |
|
6 |
V |
Output voltage step size |
|
|
50 |
|
mV |
Output voltage accuracy |
Output voltage = 5.4 V |
–1.5% |
|
1.5% |
|
VPOS line transient response (3) |
VIN + 500 mVp-p AC square wave, Tr = 100 mV/µs, 200 Hz, ILOAD = 25 mA, CIN = 10 µF |
–50 |
|
50 |
mV |
VPOS load transient response (3) |
0 to 50 mA load transient, CVPOS = 10 µF |
–50 |
|
50 |
mV |
DC load regulation (3) |
0 mA ≤ IVPOS ≤ 50 mA |
|
|
20 |
mV |
IMAX_VPOS |
Maximum output current |
|
|
50 |
|
mA |
ICL_VPOS |
Output current limit |
|
|
80 |
|
mA |
IRUSH_PK_VPOS |
Peak start-up inrush current (3) |
VLCM_OUT = 6.3 V, VPOS = 5.8 V, CVPOS = 10 µF |
|
|
250 |
mA |
VDO_VPOS |
VPOS dropout voltage (4) |
IVPOS = 50 mA, VVPOS = 5.5 V |
|
|
100 |
mV |
tST_VPOS |
Start-up time VPOS, VVPOS = 10% to 90% (3) |
CVPOS = 10 µF |
500-µs setting |
|
500 |
|
µs |
800-µs setting |
|
800 |
|
RPD_VPOS |
Output pull-down resistor (VPOS) |
VPOS disabled |
30 |
80 |
110 |
Ω |
DISPLAY BIAS NEGATIVE OUTPUT (VNEG) |
VOVP_VNEG |
LCM bias negative charge-pump output overvoltage protection |
Below VVNEG output voltage target |
|
–250 |
|
mV |
VSHORT_VNEG |
LCM bias negative charge-pump output short circuit protection |
VNEG to CP_GND |
|
–750 |
|
mV |
VVNEG |
Programmable output voltage range |
|
–6 |
|
–4 |
V |
Output voltage step size |
|
|
50 |
|
mV |
Output accuracy |
Output voltage = –5.4 V |
–1.5% |
|
1.5% |
|
Peak-to-peak ripple voltage(3) |
ILOAD = 5 mA & 50 mA, CVNEG = 10 µF |
|
60 |
|
mVpp |
VNEG line transient response(3) |
VIN + 500 mVp-p AC square wave, 100 mV/µs 200 Hz, 12.5% duty at 5 mA |
–50 |
±25 |
50 |
mV |
VNEG load transient response(3) |
0 to 50 mA load transient, TRISE/FALL = 1 µs, CVNEG = 10 µF |
|
|
100 |
mV |
Efficiency(2) |
VIN = 3.7 V, VLCM_OUT = 5.8 V, VVNEG = –5.4 V, IVNEG > 5 mA |
|
92% |
|
|
IMAX_VNEG |
Maximum output current(3) |
VIN = 3.7 V, VLCM_OUT = 5.8 V, VVNEG = –5.4 V |
|
50 |
|
mA |
ICL_VNEG |
Output current limit(3) |
|
|
75 |
|
mA |
RDSON_VNEG |
Charge FET pump on resistance |
Q1 |
|
350 |
|
mΩ |
Q2 |
|
400 |
|
Q3 |
|
400 |
|
tST_VNEG |
Start-up time (VVNEG), VVNEG = 10% to 90%(3) |
VVNEG = –6 V, CVNEG = 10 µF |
|
1 |
|
ms |
RPU_VNEG |
Output pullup resistor, VNEG(3) |
VNEG Disabled, VLCM_OUT > 4.8 V |
|
20 |
40 |
Ω |
FLASH DRIVER BOOST |
ILED |
Current source accuracy |
1.5-A flash, VFL_OUT = 4 V |
1.4 |
1.5 |
1.6 |
A |
VOVP |
Output overvoltage protection trip point |
ON threshold |
4.85 |
5 |
5.1 |
V |
OFF threshold |
4.75 |
4.9 |
5 |
VHR |
Current source regulation voltage |
1.5-A flash, VFL_OUT = 4 V |
|
275 |
|
mV |
ICL |
Switch current limit |
|
2.45 |
2.8 |
3.15 |
A |
1.65 |
1.9 |
2.15 |
RNMOS |
NMOS switch on resistance |
INMOS = 1 A |
|
80 |
|
mΩ |
RPMOS |
PMOS switch on resistance |
IPMOS = 1 A |
|
100 |
|
VVINM |
Input voltage monitor trip threshold |
|
2.76 |
2.9 |
3.04 |
V |
LOGIC INPUTS (PWM, EN, LCM_EN1, LCM_EN2, SCL, SDA, TX, STROBE) |
VIL |
Input logic low |
|
0 |
|
0.4 |
V |
VIH |
Input logic high |
|
1.2 |
|
VIN |
V |
LOGIC OUTPUTS (SDA) |
VOL |
Output logic low |
2.7 V ≤ VIN ≤ 5 V, IOL = 3 mA |
0 |
|
0.4 |
V |
PWM INPUT |
ƒPWM_INPUT |
PWM input frequency(2) |
|
100 |
|
20000 |
Hz |
|
Minimum PWM ON/OFF time(3) |
PWM sampling frequency = 1 MHz |
6 |
|
|
µs |
PWM sampling frequency = 4 MHz |
1.5 |
|
|
|
PWM timeout(3) |
PWM sampling frequency = 1 MHz |
|
25 |
|
ms |
PWM sampling frequency = 4 MHz |
|
3 |
|