JAJS686D February   2000  – September 2018 LM4051-N

PRODUCTION DATA.  

1. 1 特長
2. 2 アプリケーション
3. 3 概要
   1.     Device Images
      1.      1.2VREFの概略回路図
      2.      可変基準電圧の概略回路図
4. 4 改訂履歴
5. 5 Pin Configuration and Functions
   1.     Pin Functions
6. 6 Specifications
   1. 6.1 Absolute Maximum Ratings
   2. 6.2 ESD Ratings
   3. 6.3 Recommended Operating Conditions
   4. 6.4 Thermal Information
   5. 6.5 LM4051-1.2 Electrical Characteristics
   6. 6.6 LM4051-ADJ Electrical Characteristics
   7. 6.7 Typical Characteristics
7. 7 Parameter Measurement Information
8. 8 Detailed Description
   1. 8.1 Overview
   2. 8.2 Functional Block Diagram
   3. 8.3 Feature Description
   4. 8.4 Device Functional Modes
      1. 8.4.1 LM4051-N - 1.2 V
      2. 8.4.2 LM4051-N - ADJ
9. 9 Application and Implementation
   1. 9.1 Application Information
   2. 9.2 Typical Applications
      1. 9.2.1 Shunt Regulator
         1. 9.2.1.1 Design Requirements
         2. 9.2.1.2 Detailed Design Procedure
         3. 9.2.1.3 Application Curves
      2. 9.2.2 Adjustable Shunt Regulator
         1. 9.2.2.1 Design Requirements
         2. 9.2.2.2 Detailed Design Procedure
   3. 9.3 System Examples
10. 10Power Supply Recommendations
11. 11Layout
    1. 11.1 Layout Guidelines
    2. 11.2 Layout Example
12. 12デバイスおよびドキュメントのサポート
    1. 12.1 ドキュメントの更新通知を受け取る方法
    2. 12.2 コミュニティ・リソース
    3. 12.3 商標
    4. 12.4 静電気放電に関する注意事項
    5. 12.5 Glossary
13. 13メカニカル、パッケージ、および注文情報