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LM43603レギュレータは使いやすい同期整流降圧型のDC/DCコンバータで、3.5V~36V (絶対最大定格42V)の範囲の入力電圧から、最大3Aの負荷電流を駆動できます。LM43603は、優れた効率、高い出力精度、低いドロップアウト電圧を、非常に小さなソリューション・サイズで実現します。広範な製品ファミリには、0.5A、1A、2Aの負荷電流の製品が、ピン互換のパッケージで用意されています。ピーク電流モード制御の採用によって、単純な制御ループ補償とサイクル毎の電流制限を実現しています。プログラミング可能なスイッチング周波数、外部同期、パワー・グッド・フラグ、高精度イネーブル、内部ソフト・スタート、延長可能なソフト・スタート時間、トラッキング制御といった付加機能により、幅広い範囲のアプリケーション向けに柔軟で使いやすいプラットフォームが得られます。不連続導通および自動周波数変調によって、軽負荷時の効率を向上させています。このファミリは必要な外付け部品がわずかで、単純で最適なPCBレイアウトに適したピン配置です。保護機能として、サーマル・シャットダウン、VCC低電圧誤動作防止、サイクル単位の電流制限、出力短絡保護が搭載されています。LM43603デバイスは、HTSSOP/PWPの 16リード・パッケージ(5.1mm×6.6mm×1.2mm)と、ウェッタブル・フランク付きのVSON-16パッケージで供給されます。HTSSOPパッケージは、LM43600、LM43601、LM43602、LM46000、LM46001、LM46002とピン互換です。VSON-16パッケージは、LM43602とのみピン互換です。
Changes from C Revision (February 2017) to D Revision
Changes from B Revision (September 2014) to C Revision
Changes from A Revision (April 2014) to B Revision
Changes from * Revision (April 2014) to A Revision
PIN | DESCRIPTION | |||
---|---|---|---|---|
NAME | NUMBER | TYPE(1) | ||
TSSOP | VSON | |||
SW | 1,2 | 1,2,3 | P | Switching output of the regulator. Internally connected to both power MOSFETs. Connect to power inductor. |
CBOOT | 3 | 4 | P | Boot-strap capacitor connection for high-side driver. Connect a high quality 470-nF capacitor from CBOOT to SW. |
VCC | 4 | 5 | P | Internal bias supply output for bypassing. Connect bypass capacitor from this pin to AGND. Do not connect external loading to this pin. Never short this pin to ground during operation. |
BIAS | 5 | 6 | P | Optional internal LDO supply input. To improve efficiency, it is recommended to tie to VOUT when 3.3 V ≤ VOUT ≤ 28 V, or tie to an external 3.3 V or 5 V rail if available. When used, place a bypass capacitor (1 to 10 µF) from this pin to ground. Tie to ground when not in use. Do not float |
SYNC | 6 | 7 | A | Clock input to synchronize switching action to an external clock. Use proper high speed termination to prevent ringing. Connect to ground if not used. Do not float |
RT | 7 | 8 | A | Connect a resistor RT from this pin to AGND to program switching frequency. Leave floating for 500 kHz default switching frequency. |
PGOOD | 8 | 9 | A | Open drain output for power-good flag. Use a 10 kΩ to 100 kΩ pullup resistor to logic rail or other DC voltage no higher than 12 V. |
FB | 9 | 10 | A | Feedback sense input pin. Connect to the midpoint of feedback divider to set VOUT. Do not short this pin to ground during operation. |
AGND | 10 | - | G | Analog ground pin. Ground reference for internal references and logic. Connect to system ground. |
SS/TRK | 11 | 11 | A | Soft-start control pin. Leave floating for internal soft-start slew rate. Connect to a capacitor to extend soft start time. Connect to external voltage ramp for tracking. |
EN | 12 | 12 | A | Enable input to the internal LDO and regulator. High = ON and low = OFF. Connect to VIN, or to VIN through resistor divider,or to an external voltage or logic source. Do not float. |
VIN | 13,14 | 13,14 | P | Supply input pins to internal LDO and high side power FET. Connect to power supply and bypass capacitors CIN. Path from VIN pin to high frequency bypass CIN and PGND must be as short as possible. |
PGND | 15,16 | 15,16 | G | Power ground pins, connected internally to the low side power FET. Connect to system ground, PAD, AGND, ground pins of CIN and COUT. Path to CIN must be as short as possible. |
PAD | - | - | - | Low impedance connection to AGND. Connect to PGND on PCB . Major heat dissipation path of the die. Must be used for heat sinking to ground plane on PCB. |