JAJSBZ5C April   2014  – April 2019 LM46002

PRODUCTION DATA.  

  1. 1 特長
  2. 2 アプリケーション
  3. 3 概要
    1.     Device Images
      1.      概略回路図
      2.      放射エミッションのグラフ VIN = 24V、VOUT =3.3V、FS = 500kHz、IOUT = 2A
  4. 4 改訂履歴
  5. 5 Pin Configuration and Functions
    1.     Pin Functions
  6. 6 Specifications
    1. 6.1 Absolute Maximum Ratings
    2. 6.2 ESD Ratings
    3. 6.3 Recommended Operating Conditions
    4. 6.4 Thermal Information
    5. 6.5 Electrical Characteristics
    6. 6.6 Timing Requirements
    7. 6.7 Switching Characteristics
    8. 6.8 Typical Characteristics
  7. 7 Detailed Description
    1. 7.1 Overview
    2. 7.2 Functional Block Diagram
    3. 7.3 Feature Description
      1. 7.3.1  Fixed-Frequency, Peak-Current-Mode-Controlled, Step-Down Regulator
      2. 7.3.2  Light Load Operation
      3. 7.3.3  Adjustable Output Voltage
      4. 7.3.4  Enable (ENABLE)
      5. 7.3.5  VCC, UVLO, and BIAS
      6. 7.3.6  Soft Start and Voltage Tracking (SS/TRK)
      7. 7.3.7  Switching Frequency (RT) and Synchronization (SYNC)
      8. 7.3.8  Minimum ON-Time, Minimum OFF-Time, and Frequency Foldback at Dropout Conditions
      9. 7.3.9  Internal Compensation and CFF
      10. 7.3.10 Bootstrap Voltage (BOOT)
      11. 7.3.11 Power Good (PGOOD)
      12. 7.3.12 Overcurrent and Short-Circuit Protection
      13. 7.3.13 Thermal Shutdown
    4. 7.4 Device Functional Modes
      1. 7.4.1 Shutdown Mode
      2. 7.4.2 Standby Mode
      3. 7.4.3 Active Mode
      4. 7.4.4 CCM Mode
      5. 7.4.5 Light Load Operation
      6. 7.4.6 Self-Bias Mode
  8. 8 Applications and Implementation
    1. 8.1 Application Information
    2. 8.2 Typical Applications
      1. 8.2.1 Design Requirements
      2. 8.2.2 Detailed Design Procedure
        1. 8.2.2.1  Custom Design With WEBENCH® Tools
        2. 8.2.2.2  Output Voltage Setpoint
        3. 8.2.2.3  Switching Frequency
        4. 8.2.2.4  Input Capacitors
        5. 8.2.2.5  Inductor Selection
        6. 8.2.2.6  Output Capacitor Selection
        7. 8.2.2.7  Feed-Forward Capacitor
        8. 8.2.2.8  Bootstrap Capacitors
        9. 8.2.2.9  VCC Capacitor
        10. 8.2.2.10 BIAS Capacitors
        11. 8.2.2.11 Soft-Start Capacitors
        12. 8.2.2.12 Undervoltage Lockout Setpoint
        13. 8.2.2.13 PGOOD
      3. 8.2.3 Application Performance Curves
  9. 9 Power Supply Recommendations
  10. 10Layout
    1. 10.1 Layout Guidelines
      1. 10.1.1 Compact Layout for EMI Reduction
      2. 10.1.2 Ground Plane and Thermal Considerations
      3. 10.1.3 Feedback Resistors
    2. 10.2 Layout Example
  11. 11デバイスおよびドキュメントのサポート
    1. 11.1 デバイス・サポート
      1. 11.1.1 開発サポート
        1. 11.1.1.1 WEBENCH®ツールによるカスタム設計
    2. 11.2 ドキュメントの更新通知を受け取る方法
    3. 11.3 コミュニティ・リソース
    4. 11.4 商標
    5. 11.5 静電気放電に関する注意事項
    6. 11.6 Glossary
  12. 12メカニカル、パッケージ、および注文情報

パッケージ・オプション

デバイスごとのパッケージ図は、PDF版データシートをご参照ください。

メカニカル・データ（パッケージ｜ピン）
  • PWP|16
サーマルパッド・メカニカル・データ
発注情報

8.2 Typical Applications

The LM46002 only requires a few external components to convert from a wide range of supply voltage to output voltage. Figure 44 shows a basic schematic when BIAS is connected to VOUT . This is recommended for VOUT ≥ 3.3 V. For VOUT < 3.3 V, connect BIAS to ground, as shown in Figure 45.

LM46002 sch_basic01_snvsa13.gifFigure 44. LM46002 Basic Schematic for
VOUT ≥ 3.3 V, Tie BIAS to VOUT
LM46002 sch_basic02_snvsa13.gifFigure 45. LM46002 Basic Schematic for
VOUT < 3.3 V, t-Tie BIAS to Ground

The LM46002 also integrates a full list of optional features to aid system design requirements, such as precision enable, VCC UVLO, programmable soft start, output voltage tracking, programmable switching frequency, clock synchronization, and power-good indication. Each application can select the features for a more comprehensive design. A schematic with all features utilized is shown in Figure 46.

LM46002 sch_full_feat.gifFigure 46. LM46002 Schematic with All Features

The external components must fulfill the needs of the application, but also the stability criteria of the device control loop. The LM46002 is optimized to work within a range of external components. The inductance and capacitance of the LC output filter must be considered in conjunction, creating a double pole, responsible for the corner frequency of the converter. Table 2 can be used to simplify the output filter component selection.

Table 2. L, COUT and CFF Typical Values

FS (kHz) L (µH)(1) COUT (µF) (2) CFF (pF) (3)(4) RT (kΩ) RFBB (kΩ) (3)(4)
VOUT = 1 V
200 8.2 560 none 200 100
500 3.3 470 none 80.6 or open 100
1000 1.8 220 none 39.2 100
2200 0.68 150 none 17.8 100
VOUT = 3.3 V
200 27 250 56 200 432
500 10 150 47 80.6 or open 432
1000 4.7 100 33 39.2 432
2200 2.2 47 22 17.8 432
VOUT = 5 V
200 33 200 68 200 249
500 15 100 47 80.6 or open 249
1000 6.8 47 47 39.2 249
2200 3.3 33 33 17.8 249
VOUT = 12 V
200 56 68 see note (5) 200 90.9
500 22 47 68 80.6 or open 90.9
1000 10 33 47 39.2 90.9
VOUT = 24 V
200 180 68 see note (5) 200 43.2
500 47 47 see note (5) 80.6 or open 43.2
1000 22 33 see note (5) 39.2 43.2
(1) Inductor values are calculated based on typical VIN = 24 V.
(2) All the COUT values are after derating. Add more when using ceramics.
(3) RFBT = 0 Ω for VOUT = 1 V. RFBT = 1 MΩ for all other VOUT settings.
(4) For designs with RFBT other than 1 MΩ, adjust CFF so that (CFF × RFBT) is unchanged, and adjust RFBB so that (RFBT / RFBB) is unchanged.
(5) High ESR COUT provides enough phase boost, and CFF is not needed.