JAJSLR9I February   2006  – May 2021 LM5009

PRODUCTION DATA  

  1. 1 特長
  2. 2 アプリケーション
  3. 3 概要
  4. 4 Revision History
  5. 5 Pin Configuration and Functions
  6. 6 Specifications
    1. 6.1 Absolute Maximum Ratings
    2. 6.2 ESD Ratings
    3. 6.3 Recommended Operating Conditions
    4. 6.4 Thermal Information
    5. 6.5 Electrical Characteristics
    6. 6.6 Typical Characteristics
  7. 7 Detailed Description
    1. 7.1 Overview
    2. 7.2 Functional Block Diagram
    3. 7.3 Feature Description
      1. 7.3.1 Control Circuit Overview
      2. 7.3.2 High Voltage Startup Regulator
      3. 7.3.3 Regulation Comparator
      4. 7.3.4 Overvoltage Comparator
      5. 7.3.5 On-Time Generator
      6. 7.3.6 Current Limit
      7. 7.3.7 N-Channel Buck Switch and Driver
      8. 7.3.8 Thermal Protection
    4. 7.4 Device Functional Modes
  8. 8 Application and Implementation
    1. 8.1 Application Information
    2. 8.2 Typical Application
      1. 8.2.1 Design Requirements
      2. 8.2.2 Detailed Design Procedure
        1. 8.2.2.1 Output Resistor Divider Selection
        2. 8.2.2.2 Frequency Selection
        3. 8.2.2.3 Inductor Selection
        4. 8.2.2.4 VCC and Bootstrap Capacitor
        5. 8.2.2.5 Output Capacitor Selection
        6. 8.2.2.6 Current Limit Off-Timer Setting
        7. 8.2.2.7 Rectifier Diode Selection
        8. 8.2.2.8 Input Capacitor Selection
        9. 8.2.2.9 Ripple Configuration
      3. 8.2.3 Application Curves
    3. 8.3 Do's and Don'ts
  9. 9 Power Supply Recommendations
  10. 10Layout
    1. 10.1 Layout Guidelines
    2. 10.2 Layout Example
  11. 11Device and Documentation Support
    1. 11.1 Documentation Support
      1. 11.1.1 Related Documentation
    2. 11.2 Receiving Notification of Documentation Updates
    3. 11.3 サポート・リソース
    4. 11.4 Trademarks
    5. 11.5 Electrostatic Discharge Caution
    6. 11.6 Glossary
  12. 12Mechanical, Packaging, and Orderable Information

パッケージ・オプション

メカニカル・データ（パッケージ｜ピン）
サーマルパッド・メカニカル・データ
発注情報

8.2.2.9 Ripple Configuration

The LM5009 uses a constant-on-time (COT) control scheme where the on-time is terminated by a one-shot and the off-time is terminated by the feedback voltage (VFB) falling below the reference voltage. Therefore, for stable operation, the feedback voltage must decrease monotonically in phase with the inductor current during the off-time. Furthermore, this change in feedback voltage (VFB) during off-time must be large enough to dominate any noise present at the feedback node.

Table 8-2 presents three different methods for generating appropriate voltage ripple at the feedback node. Type 1 and type 2 ripple circuits couple the ripple from the output of the converter to the feedback node (FB). The output voltage ripple has two components:

  1. Capacitive ripple caused by the inductor current ripple charging or discharging the output capacitor.
  2. Resistive ripple caused by the inductor current ripple flowing through the ESR of the output capacitor and R3.

Table 8-2 Ripple Configuration
TYPE 1TYPE 2TYPE 3
Lowest costReduced rippleMinimum ripple
GUID-2A22A7E4-33D2-444A-B368-9A32AB683AB4-low.gif
GUID-E615BAF6-79D0-4A41-BE04-FA111FA82630-low.gif
GUID-024F4463-62E5-4759-A9A3-88C955B0154F-low.gif
Equation 12. GUID-7CD5437D-538C-4AB6-8ED3-CBFDCA21C553-low.gif
Equation 13. GUID-E60697BD-C924-4541-AA2C-C50D3FCE2538-low.gif
Equation 14. GUID-05BDB531-7E05-4472-9EB7-185DDBF06E5F-low.gif

The capacitive ripple is out of phase with the inductor current. As a result, the capacitive ripple does not decrease monotonically during the off-time. The resistive ripple is in phase with the inductor current and decreases monotonically during the off-time. The resistive ripple must exceed the capacitive ripple at output (VOUT) for stable operation. If this condition is not satisfied, then unstable switching behavior is observed in COT converters with multiple on-time bursts in close succession followed by a long off-time.

The type 3 ripple method uses a ripple injection circuit with RA, CA, and the switch node (SW) voltage to generate a triangular ramp. This triangular ramp is then ac-coupled into the feedback node (FB) using the capacitor CB. This circuit is suited for applications where low output voltage ripple is imperative because this circuit does not use the output voltage ripple. See application note AN-1481 Controlling Output Ripple and Achieving ESR Independence in Constant On-Time (COT) Regulator Designs, SNVA166 for more details on each ripple generation method.