JAJSBJ8F October   2005  – May 2016 LM5010A , LM5010A-Q1

PRODUCTION DATA.  

  1. 1 特長
  2. 2 アプリケーション
  3. 3 概要
  4. 4 改訂履歴
  5. 5 Pin Configuration and Functions
  6. 6 Specifications
    1. 6.1 Absolute Maximum Ratings
    2. 6.2 ESD Ratings: LM5010A
    3. 6.3 ESD Ratings: LM5010A-Q1, LM5010-Q0
    4. 6.4 Recommended Operating Conditions
    5. 6.5 Thermal Information
    6. 6.6 Electrical Characteristics
    7. 6.7 Switching Characteristics
    8. 6.8 Typical Characteristics
  7. 7 Detailed Description
    1. 7.1 Overview
    2. 7.2 Functional Block Diagram
    3. 7.3 Feature Description
      1. 7.3.1 Control Circuit Overview
      2. 7.3.2 Start-Up Regulator (VCC)
      3. 7.3.3 Regulation Comparator
      4. 7.3.4 Overvoltage Comparator
      5. 7.3.5 ON-Time Control
      6. 7.3.6 Soft Start
      7. 7.3.7 N-Channel Buck Switch and Driver
      8. 7.3.8 Current Limit
      9. 7.3.9 Thermal Shutdown
    4. 7.4 Device Functional Modes
      1. 7.4.1 Shutdown
  8. 8 Application and Implementation
    1. 8.1 Application Information
    2. 8.2 Typical Application
      1. 8.2.1 Design Requirements
      2. 8.2.2 Detailed Design Procedure
        1. 8.2.2.1 Component Selection
          1. 8.2.2.1.1  R1 and R2
          2. 8.2.2.1.2  RON, FS
          3. 8.2.2.1.3  L1
          4. 8.2.2.1.4  RCL
          5. 8.2.2.1.5  C1
          6. 8.2.2.1.6  C2 and R3
          7. 8.2.2.1.7  C3
          8. 8.2.2.1.8  C4
          9. 8.2.2.1.9  C5
          10. 8.2.2.1.10 C6
          11. 8.2.2.1.11 D1
        2. 8.2.2.2 Low Output Ripple Configurations
        3. 8.2.2.3 Increasing The Current Limit Threshold
      3. 8.2.3 Application Curves
    3. 8.3 Do's and Don'ts
  9. 9 Power Supply Recommendations
  10. 10Layout
    1. 10.1 Layout Guidelines
    2. 10.2 Layout Example
  11. 11デバイスおよびドキュメントのサポート
    1. 11.1 関連リンク
    2. 11.2 コミュニティ・リソース
    3. 11.3 商標
    4. 11.4 静電気放電に関する注意事項
    5. 11.5 Glossary
  12. 12メカニカル、パッケージ、および注文情報

パッケージ・オプション

メカニカル・データ（パッケージ｜ピン）
サーマルパッド・メカニカル・データ
発注情報

5 Pin Configuration and Functions

DPR Package
10-Pin WSON
Top View
PWP Package
14-Pin HTSSOP
Top View

Pin Functions

PIN I/O DESCRIPTION
NAME WSON HTSSOP
BST 2 3 I Boost pin for bootstrap capacitor: Connect a capacitor from SW to the BST pin. The capacitor is charged from VCC through an internal diode during the buck switch OFF-time.
EP — — — Exposed pad
FB 6 9 I Voltage feedback input from the regulated output: Input to both the regulation and overvoltage comparators. The FB pin regulation level is 2.5 V.
ISEN 3 4 I Current sense: During the buck switch OFF-time, the inductor current flows through the internal sense resistor, and out of the ISEN pin to the free-wheeling diode. The current limit comparator keeps the buck switch off if the ISEN current exceeds 1.25 A (typical).
NC — 1, 7, 8, 14 — No connection. Can be connected to ground plane to improve heat dissipation.
RON/SD 8 11 I ON-time control and shutdown: An external resistor from VIN to this pin sets the buck switch ON-time. Grounding this pin shuts down the regulator.
RTN 5 6 — Circuit ground: Ground return for all internal circuitry other than the current sense resistor.
SGND 4 5 — Sense ground: Recirculating current flows into this pin to the current sense resistor.
SS 7 10 I Soft start: An internal 11.5-µA current source charges the SS pin capacitor to 2.5 V to softstart the reference input of the regulation comparator.
SW 1 2 O Switching node: Internally connected to the buck switch source. Connect to the inductor, free-wheeling diode, and bootstrap capacitor.
VCC 9 12 I Output of the bias regulator: The voltage at VCC is nominally equal to VIN for VIN < 8.9 V, and regulated at 7 V for VIN > 8.9 V. Connect a 0.47-µF, or larger capacitor from VCC to ground, as close as possible to the pins. An external voltage can be applied to this pin to reduce internal dissipation if VIN is greater than 8.9 V. MOSFET body diodes clamp VCC to VIN if VCC > VIN.
VIN 10 13 I Input supply: Nominal input range is 6 V to 75 V. Input bypass capacitors should be located as close as possible to the VIN pin and RTN pin.