JAJSLV2 October   2022 LM5012-Q1

PRODUCTION DATA  

  1. 1 特長
  2. 2 アプリケーション
  3. 3 概要
  4. 4 Revision History
  5. 5 Device Comparison Table
  6. 6 Pin Configuration and Functions
  7. 7 Specifications
    1. 7.1 Absolute Maximum Ratings
    2. 7.2 ESD Ratings
    3. 7.3 Recommended Operating Conditions
    4. 7.4 Thermal Information
    5. 7.5 Electrical Characteristics
    6. 7.6 Typical Characteristics
  8. 8 Detailed Description
    1. 8.1 Overview
    2. 8.2 Functional Block Diagram
    3. 8.3 Feature Description
      1. 8.3.1  Control Architecture
      2. 8.3.2  Internal VCC Regulator and Bootstrap Capacitor
      3. 8.3.3  Regulation Comparator
      4. 8.3.4  Internal Soft Start
      5. 8.3.5  On-Time Generator
      6. 8.3.6  Current Limit
      7. 8.3.7  N-Channel Buck Switch and Driver
      8. 8.3.8  Schottky Diode Selection
      9. 8.3.9  Enable/Undervoltage Lockout (EN/UVLO)
      10. 8.3.10 Power Good (PGOOD)
      11. 8.3.11 Thermal Protection
    4. 8.4 Device Functional Modes
      1. 8.4.1 Shutdown Mode
      2. 8.4.2 Standby Mode
      3. 8.4.3 Active Mode
      4. 8.4.4 Sleep Mode
  9. 9 Application and Implementation
    1. 9.1 Application Information
    2. 9.2 Typical Application
      1. 9.2.1 Design Requirements
      2. 9.2.2 Detailed Design Procedure
        1. 9.2.2.1 Custom Design With WEBENCH® Tools
        2. 9.2.2.2 Switching Frequency (RRON)
        3. 9.2.2.3 Buck Inductor (LO)
        4. 9.2.2.4 Output Capacitor (COUT)
        5. 9.2.2.5 Input Capacitor (CIN)
        6. 9.2.2.6 Type 3 Ripple Network
      3. 9.2.3 Application Curves
    3. 9.3 Power Supply Recommendations
    4. 9.4 Layout
      1. 9.4.1 Layout Guidelines
        1. 9.4.1.1 Compact PCB Layout for EMI Reduction
        2. 9.4.1.2 Feedback Resistors
      2. 9.4.2 Layout Example
        1. 9.4.2.1 Thermal Considerations
  10. 10Device and Documentation Support
    1. 10.1 Device Support
      1. 10.1.1 Third-Party Products Disclaimer
      2. 10.1.2 Development Support
        1. 10.1.2.1 Custom Design With WEBENCH® Tools
    2. 10.2 Documentation Support
      1. 10.2.1 Related Documentation
    3. 10.3 Receiving Notification of Documentation Updates
    4. 10.4 サポート・リソース
    5. 10.5 Trademarks
    6. 10.6 Electrostatic Discharge Caution
    7. 10.7 Glossary
  11. 11Mechanical, Packaging, and Orderable Information

パッケージ・オプション

メカニカル・データ（パッケージ｜ピン）
サーマルパッド・メカニカル・データ
発注情報

9.2.3 Application Curves

VOUT = 12 V RON = 102 kΩ LO = 22 μH
Figure 9-2 Conversion Efficiency (Log Scale)
GUID-55030F68-A02F-43D0-BC65-8E468D689BAE-low.png
VOUT = 12 V RON = 102 kΩ LO = 22 μH
Figure 9-4 Load and Line Regulation Performance
GUID-20211102-SS0I-XXJK-G7FH-TKZCCXC6Q8P4-low.png
VIN = 48 V VOUT = 12 V IOUT = 0 A
Figure 9-6 No-Load Start-Up with EN/UVLO
GUID-20220818-SS0I-TXLH-TND9-0ZWCRVLVMRL6-low.png
VIN = 48 V VOUT 12 V Load = 0 A to Short
Figure 9-8 Short-Circuit Recovery
GUID-20220304-SS0I-PQZR-GKLK-ZCHWWVFSDW2H-low.png
VIN = 48 V VOUT = 12 V IOUT = 2.5 A
Figure 9-10 Full-Load Switching
GUID-20211206-SS0I-G8VH-GGRN-T3BJ11FSXSF9-low.png
VIN = 48 VVOUT = 12 VIOUT = 3.5 A

(LM5013-Q1)

Figure 9-12 CISPR 25 Class 5 Conducted Emissions Plot, 150 kHz to 110 MHz
GUID-BED486C2-A5F9-429D-B8F7-BF892CE6BC0F-low.png
VOUT = 12 V RON = 102 kΩ LO = 22 μH
Figure 9-3 Conversion Efficiency (Linear Scale)
GUID-43FE1B46-31DE-4A7B-A943-FF93769C6DAA-low.png
VIN = 48 V VOUT = 12 V IOUT = 1.0-A to 2.5-A

(Rise/fall time = 1A/uS)
Figure 9-5 Load Step Response
GUID-20220818-SS0I-CHPB-CD1Z-RZPDD2H7FNZ1-low.png
VIN = 48 V VOUT 12 V Load = 0 A to Short
Figure 9-7 Short Circuit Applied
GUID-20211101-SS0I-S7QZ-6SHG-TB21JS4LM1MC-low.png
VIN = 48 VVOUT 12 VIOUT = 200 mA
Figure 9-9 Light-Load Switching
GUID-20211206-SS0I-BJ4T-9R1T-QHS5JDFKWV8V-low.gif
Filter used for EMC scan. Additionally, the regulator was housed in an enclosed shield.
Figure 9-11 Suggested EMC Filter for CISPR 25 Class 5 Compliance