JAJSGX1G September   2006  – Jaunuary 2020 LM5069

PRODUCTION DATA.  

  1. 特長
  2. アプリケーション
  3. 概要
    1.     Device Images
      1.      代表的なアプリケーションの図
  4. 改訂履歴
    1.     Device Comparison
  5. Pin Configuration and Functions
    1.     Pin Functions
  6. Specifications
    1. 6.1 Absolute Maximum Ratings
    2. 6.2 ESD Ratings
    3. 6.3 Recommended Operating Conditions
    4. 6.4 Thermal Information
    5. 6.5 Electrical Characteristics
    6. 6.6 Typical Characteristics
  7. Detailed Description
    1. 7.1 Overview
    2. 7.2 Functional Block Diagram
    3. 7.3 Feature Description
      1. 7.3.1 Current Limit
      2. 7.3.2 Circuit Breaker
      3. 7.3.3 Power Limit
      4. 7.3.4 Undervoltage Lockout (UVLO)
      5. 7.3.5 Overvoltage Lockout (OVLO)
      6. 7.3.6 Power Good Pin
    4. 7.4 Device Functional Modes
      1. 7.4.1 Power Up Sequence
      2. 7.4.2 Gate Control
      3. 7.4.3 Fault Timer and Restart
      4. 7.4.4 Shutdown Control
  8. Application and Implementation
    1. 8.1 Application Information
    2. 8.2 Typical Application
      1. 8.2.1 48-V, 10-A Hot Swap Design
        1. 8.2.1.1 Design Requirements
        2. 8.2.1.2 Detailed Design Procedure
          1. 8.2.1.2.1 Select RSNS and CL setting
          2. 8.2.1.2.2 Selecting the Hot Swap FET(s)
          3. 8.2.1.2.3 Select Power Limit
          4. 8.2.1.2.4 Set Fault Timer
          5. 8.2.1.2.5 Check MOSFET SOA
          6. 8.2.1.2.6 Set Undervoltage and Overvoltage Threshold
            1. 8.2.1.2.6.1 Option A
            2. 8.2.1.2.6.2 Option B
            3. 8.2.1.2.6.3 Option C
            4. 8.2.1.2.6.4 Option D
          7. 8.2.1.2.7 Input and Output Protection
          8. 8.2.1.2.8 Final Schematic and Component Values
        3. 8.2.1.3 Application Curves
  9. Power Supply Recommendations
  10. 10Layout
    1. 10.1 Layout Guidelines
      1. 10.1.1 PC Board Guidelines
      2. 10.1.2 System Considerations
    2. 10.2 Layout Example
  11. 11デバイスおよびドキュメントのサポート
    1. 11.1 デバイス・サポート
      1. 11.1.1 開発サポート
    2. 11.2 ドキュメントのサポート
      1. 11.2.1 関連資料
    3. 11.3 ドキュメントの更新通知を受け取る方法
    4. 11.4 コミュニティ・リソース
    5. 11.5 商標
    6. 11.6 静電気放電に関する注意事項
    7. 11.7 Glossary
  12. 12メカニカル、パッケージ、および注文情報

パッケージ・オプション

メカニカル・データ(パッケージ|ピン)
サーマルパッド・メカニカル・データ
発注情報

Selecting the Hot Swap FET(s)

It is critical to select the correct MOSFET for a hot swap design. The device must meet the following requirements:

  • The VDS rating must be sufficient to handle the maximum system voltage along with any ringing caused by transients.
  • The SOA of the FET must be sufficient to handle all usage cases: start-up, hot-short, start into short.
  • RDSON must be sufficiently low to maintain the junction and case temperature below the maximum rating of the FET. In fact, TI recommends keeping the steady state FET temperature below 125°C to allow margin to handle transients.
  • Maximum continuous current rating must be above the maximum load current and the pulsed drain current must be greater than the current threshold of the circuit breaker. Most MOSFETs that pass the first three requirements also pass these two.

For this design the SUM40N15-38 was selected. After selecting the MOSFET, the maximum steady state case temperature can be computed as Equation 4.

Equation 4. LM5069 Equation4_SNVS452.gif

Note that the RDSON is a strong function of junction temperature, which for most MOSFETs is close to the case temperature. A few iterations of the above equations may be necessary to converge on the final RDSON and TC,MAX value. According to the CSD19536KTT datasheet, its RDSON is approximately 1.2× at 65°C. Equation 5 uses this RDSON value to compute the TC,MAX.

Equation 5. LM5069 Equation5_SNVS452.gif

This maximum steady state case temperature does not indicate that a second MOSFET may be required to reduce and distribute power dissipation during normal operation.

As an aside, when using parallel MOSFETs, the maximum steady state case temperature can be computed in Equation 6.

Equation 6. LM5069 Equation6_SNVS452.gif

Iterate until the computed TC,MAX is using two parallel MOSFETs is less than to the junction temperature assumed for RDSON. Then, no further iterations are necessary.