JAJSHD4A may   2019  – july 2023 LM5108

PRODUCTION DATA  

  1.   1
  2. 1 特長
  3. 2 アプリケーション
  4. 3 概要
  5. 4 Revision History
  6. 5 Pin Configuration and Functions
  7. 6 Specifications
    1. 6.1 Absolute Maximum Ratings
    2. 6.2 ESD Ratings
    3. 6.3 Recommended Operating Conditions
    4. 6.4 Thermal Information
    5. 6.5 Electrical Characteristics
    6. 6.6 Switching Characteristics
    7. 6.7 Typical Characteristics
  8. 7 Detailed Description
    1. 7.1 Overview
    2. 7.2 Functional Block Diagram
    3. 7.3 Feature Description
      1. 7.3.1 Enable
      2. 7.3.2 Start-up and UVLO
      3. 7.3.3 Input Stages and Interlock Protection
      4. 7.3.4 Level Shifter
      5. 7.3.5 Output Stage
      6. 7.3.6 Negative Voltage Transients
    4. 7.4 Device Functional Modes
  9. 8 Application and Implementation
    1. 8.1 Application Information
    2. 8.2 Typical Application
      1. 8.2.1 Design Requirements
      2. 8.2.2 Detailed Design Procedure
        1. 8.2.2.1 Select Bootstrap and VDD Capacitor
        2. 8.2.2.2 Estimate Driver Power Losses
        3. 8.2.2.3 Selecting External Gate Resistor
        4. 8.2.2.4 Delays and Pulse Width
        5. 8.2.2.5 External Bootstrap Diode
        6. 8.2.2.6 VDD and Input Filter
        7. 8.2.2.7 Transient Protection
      3. 8.2.3 Application Curves
  10. 9 Power Supply Recommendations
  11. 10Layout
    1. 10.1 Layout Guidelines
    2. 10.2 Layout Example
  12. 11Device and Documentation Support
    1. 11.1 サード・パーティ製品に関する免責事項
    2. 11.2 ドキュメントの更新通知を受け取る方法
    3. 11.3 サポート・リソース
    4. 11.4 Trademarks
    5. 11.5 静電気放電に関する注意事項
    6. 11.6 用語集
  13. 12Mechanical, Packaging, and Orderable Information

パッケージ・オプション

メカニカル・データ（パッケージ｜ピン）
サーマルパッド・メカニカル・データ
発注情報

8.2.3 Application Curves

To minimize the switching losses in power supplies, turn-ON and turn-OFF of the power MOSFETs need to be as fast as possible. Higher the drive current capability of the driver, faster the switching. Therefore, the LM5108 is designed with high drive current capability and low resistance of the output stages. One of the common way to test the drive capability of the gate driver device , is to test it under heavy load. Rise time and fall time of the outputs would provide idea of drive capability of the gate driver device. There must not be any resistance in this test circuit. Figure 8-2 and Figure 8-3 shows rise time and fall time of HO respectively of LM5108. Figure 8-4 and Figure 8-5 shows rise time and fall time of LO respectively of LM5108. For accuracy purpose, the VDD and HB pin of the gate driver device were connected together. HS and VSS pins are also connected together for this test.

Peak current capability can be estimated using the fastest dV/dt along the rise and fall curve of the plot. This method is also useful in comparing performance of two or more gate driver devices.

As explained in Section 8.2.2.4, propagation delay plays an important role in reliable operation of many applications. Figure 8-6 and Figure 8-7 shows propagation delays of LM5108. In many switching power supply applications input signals to the gate driver have large amplitude high frequency noise. If there is no filter employed at the input, then there is a possibility of false signal passing through the gate driver and causing shoot-through on the output. LM5108 prevents such shoot-through. If two inputs are high at the same time, LM5108 shuts both the outputs off. Figure 8-8 shows interlock feature of LM5108.

GUID-A206E0AC-3408-4B56-98E8-B9427E22EF8A-low.gif
VDD=VHB=12 V, HS=VSS CLOAD=68 nF Ch1=HI, Ch3=HO
Figure 8-2 HO Rise Time
GUID-641E0F6C-5668-4448-BD78-49C313030275-low.gif
VDD=VHB=12 V, HS=VSS CLOAD=68 nF Ch2=LI, Ch4=LO
Figure 8-4 LO Rise Time
GUID-F45B7056-726F-4C12-8322-5077C0982F57-low.gif
VDD=VHB=12 V, HS=VSS CLOAD=No load Ch1=HI Ch2=LI Ch3=HO Ch4=LO
Figure 8-6 Propagation Delay
GUID-5D5A94D7-9796-4B91-8F2C-396DA7351762-low.gif
VDD=VHB=12 V, HS=VSS CLOAD=0 nF
Figure 8-8 Shoot-through Protection or Interlock
GUID-E7791E3A-8DCF-4D87-9EE2-C058430B2382-low.gif
VDD=VHB=12 V, HS=VSS CLOAD=68 nF Ch1=HI, Ch3=HO
Figure 8-3 HO Fall Time
GUID-9E34826B-DE12-421D-88F5-2F03C0A2F38C-low.gif
VDD=VHB=12 V, HS=VSS CLOAD=68 nF Ch2=LI, Ch4=LO
Figure 8-5 LO Fall Time
GUID-B68F3288-56C9-4268-BE81-5F8E800DE4C3-low.gif
VDD=VHB=12 V, HS=VSS CLOAD=No load Ch1=HI Ch2=LI Ch3=HO Ch4=LO
Figure 8-7 Propagation Delay