JAJSRS8I February   2007  – November 2023 LM5116

PRODUCTION DATA  

  1.   1
  2. 特長
  3. アプリケーション
  4. 概要
  5. Pin Configuration and Functions
  6. Specifications
    1. 5.1 Absolute Maximum Ratings
    2. 5.2 ESD Ratings
    3. 5.3 Recommended Operating Conditions
    4. 5.4 Thermal Information
    5. 5.5 Electrical Characteristics
    6. 5.6 Switching Characteristics
    7. 5.7 Typical Performance Characteristics
  7. Detailed Description
    1. 6.1 Overview
    2. 6.2 Functional Block Diagram
    3. 6.3 Feature Description
      1. 6.3.1 High Voltage Start-Up Regulator
      2. 6.3.2 Enable
      3. 6.3.3 UVLO
      4. 6.3.4 Oscillator and Sync Capability
      5. 6.3.5 Error Amplifier and PWM Comparator
      6. 6.3.6 Ramp Generator
      7. 6.3.7 Current Limit
      8. 6.3.8 HO Output
      9. 6.3.9 Thermal Protection
    4. 6.4 Device Functional Modes
      1. 6.4.1 Soft-Start and Diode Emulation
  8. Application and Implementation
    1. 7.1 Application Information
    2. 7.2 Typical Application
      1. 7.2.1 Design Requirements
      2. 7.2.2 Detailed Design Procedure
        1. 7.2.2.1  Custom Design with WEBENCH® Tools
        2. 7.2.2.2  Timing Resistor
        3. 7.2.2.3  Output Inductor
        4. 7.2.2.4  Current Sense Resistor
        5. 7.2.2.5  Ramp Capacitor
        6. 7.2.2.6  Output Capacitors
        7. 7.2.2.7  Input Capacitors
        8. 7.2.2.8  VCC Capacitor
        9. 7.2.2.9  Bootstrap Capacitor
        10. 7.2.2.10 Soft Start Capacitor
        11. 7.2.2.11 Output Voltage Divider
        12. 7.2.2.12 UVLO Divider
        13. 7.2.2.13 MOSFETs
        14. 7.2.2.14 MOSFET Snubber
        15. 7.2.2.15 Error Amplifier Compensation
        16. 7.2.2.16 Comprehensive Equations
          1. 7.2.2.16.1 Current Sense Resistor and Ramp Capacitor
          2. 7.2.2.16.2 Modulator Transfer Function
          3. 7.2.2.16.3 Error Amplifier Transfer Function
      3. 7.2.3 Application Curves
    3. 7.3 Power Supply Recommendations
    4. 7.4 Layout
      1. 7.4.1 Layout Guidelines
      2. 7.4.2 Layout Example
  9. Device and Documentation Support
    1. 8.1 Device Support
      1. 8.1.1 サード・パーティ製品に関する免責事項
      2. 8.1.2 Development Support
        1. 8.1.2.1 Custom Design with WEBENCH® Tools
    2. 8.2 ドキュメントの更新通知を受け取る方法
    3. 8.3 サポート・リソース
    4. 8.4 Trademarks
    5. 8.5 静電気放電に関する注意事項
    6. 8.6 用語集
  10. Revision History
  11. 10Mechanical, Packaging, and Orderable Information

パッケージ・オプション

メカニカル・データ(パッケージ|ピン)
サーマルパッド・メカニカル・データ
発注情報

UVLO Divider

A voltage divider and filter can be connected to the UVLO pin to set a minimum operating voltage VIN(MIN) for the regulator. If this feature is required, the following procedure can be used to determine appropriate resistor values for RUV2, RUV1 and CFT.

  1. RUV2 must be large enough such that in the event of a current limit, the internal UVLO switch can pull UVLO < 200 mV. This can be accomplished if: RUV2 > 500 ✕ VIN(MAX)Where VIN(MAX) is the maximum input voltage and RUV2 is in ohms.
  2. With an appropriate value for RUV2, RUV1 can be selected using the following equation:
    GUID-0402DEC3-F663-4958-BA4F-F4EF6800BE26-low.gif
    Where VIN(MIN) is the desired shutdown voltage.
  3. Capacitor CFT provides filtering for the divider and determines the off-time of the “hiccup” duty cycle during current limit. When CFT is used in conjunction with the voltage divider, a diode across the top resistor must be used to discharge CFT in the event of an input undervoltage condition.
    GUID-447C87B9-0B23-4667-94F1-56A386361F91-low.gif

If undervoltage shutdown is not required, RUV1 and RUV2 can be eliminated and the off-time becomes:

Equation 25. GUID-B86FD2AE-3E33-4F61-9936-3A240F9DAF80-low.gif

The voltage at the UVLO pin must never exceed 16 V when using an external set-point divider. It can be necessary to clamp the UVLO pin at high input voltages. For the design example, RUV2 = 102 kΩ and RUV1 = 21 kΩ for a shut-down voltage of 6.6 V. If sustained short circuit protection is required, CFT ≥ 1 µF will limit the short circuit power dissipation. D2 can be installed when using CFT with RUV1 and RUV2.