The device provides N-channel logic MOSFET drivers which can source a peak current of 2.2 A and sink a peak current of 3.3 A. The drivers are powered by VCC or HB, and enabled when EN is greater than V_EN and VCC is greater than V_VCC-UVLO.

When the low-side driver turns on, the SW pin voltage is approximately 0 V and the C_HB is charged from VCC through a boot diode. In boost configuration, the boot diode is internally connected from VCC to HB1. Connect external boot diodes in buck configuration. The recommended minimum value of C_HB is 0.1-μF.

The LO and HO outputs are controlled with an adaptive dead-time methodology which ensures that both outputs are not enabled at the same time. When the device commands LO to be enabled, the adaptive dead-time logic first disables HO and waits for HO-SW voltage to drop. LO is then enabled after a small delay. Similarly, the HO turnon is delayed until the LO-PGND voltage has discharged. HO is then enabled after a small delay. The adaptive dead-time circuit insures that both outputs are not enabled at the same time when Q_G@5V is less than 40 nC over the temperature.

If the minimum BIAS pin voltage is below V_VCC-REG, extra care should be taken when selecting the MOSFETs. Especially during start-up at low BIAS input voltage, the gate plateau voltage of the MOSFET should be less than the BIAS pin voltage to completely enhance the MOSFET. If the driver output voltage is lower than the MOSFET gate plateau voltage during start-up, the converter may not start up properly and it can stick at the maximum duty cycle in a high power dissipation state. This condition can be avoided by selecting a lower threshold MOSFET or by turning on the channel when the BIAS pin voltage is sufficient.

Figure 8-23 Driver Structure (Internal boot diode is available only in boost)

The hiccup mode protection is triggered by the HB UVLO in boost configuration. If the HB-to-SW voltage is less than the HB UVLO threshold (V_HB-UVLO), the LO turns on for 75 ns to replenish the boost capacitor. The device allows up to four consecutive replenish switchings. After four consecutive boot replenish switching, the channel skips the boot replenish switching for 12 cycles. If the channel fails to replenish the boost capacitor after the four sets of the four consecutive replenish switching, the channel stops switching and enters hiccup mode fault protection.

If required, the slew rate of the switching node voltage is adjusted by the resistor in series with the HB pin up to 5-Ω in buck configuration. If required, use a gate resistor in parallel with a pulldown PNP transistor. Care should be taken when adding a gate resistor as this can decrease the effective dead-time.

Figure 8-24 Slew Rate Control (a) HB Resistor for Buck, (b) Gate Resistor with Pulldown PNP Transistor