JAJSK70B
october 2020 – august 2023
LM5157-Q1
,
LM51571-Q1
PRODUCTION DATA
1
1
特長
2
アプリケーション
3
概要
4
Revision History
5
概要 (続き)
6
Device Comparison Table
7
Pin Configuration and Functions
8
Specifications
8.1
Absolute Maximum Ratings
8.2
ESD Ratings
8.3
Recommended Operating Conditions
8.4
Thermal Information
8.5
Electrical Characteristics
8.6
Typical Characteristics
9
Detailed Description
9.1
Overview
9.2
Functional Block Diagram
9.3
Feature Description
9.3.1
Line Undervoltage Lockout (UVLO/SYNC/EN Pin)
9.3.2
High Voltage VCC Regulator (BIAS, VCC Pin)
9.3.3
Soft Start (SS Pin)
9.3.4
Switching Frequency (RT Pin)
9.3.5
Dual Random Spread Spectrum – DRSS (MODE Pin)
9.3.6
Clock Synchronization (UVLO/SYNC/EN Pin)
9.3.7
Current Sense and Slope Compensation
9.3.8
Current Limit and Minimum On Time
9.3.9
Feedback and Error Amplifier (FB, COMP Pin)
9.3.10
Power-Good Indicator (PGOOD Pin)
9.3.11
Hiccup Mode Overload Protection (MODE Pin)
9.3.12
Maximum Duty Cycle Limit and Minimum Input Supply Voltage
9.3.13
Internal MOSFET (SW Pin)
9.3.14
Overvoltage Protection (OVP)
9.3.15
Thermal Shutdown (TSD)
9.4
Device Functional Modes
9.4.1
Shutdown Mode
9.4.2
Standby Mode
9.4.3
Run Mode
9.4.3.1
Spread Spectrum Enabled
9.4.3.2
Hiccup Mode Protection Enabled
10
Application and Implementation
10.1
Application Information
10.2
Typical Application
10.2.1
Design Requirements
10.2.2
Detailed Design Procedure
10.2.2.1
Custom Design With WEBENCH® Tools
10.2.2.2
Recommended Components
10.2.2.3
Inductor Selection (LM)
10.2.2.4
Output Capacitor (COUT)
10.2.2.5
Input Capacitor
10.2.2.6
Diode Selection
10.2.3
Application Curve
10.3
System Examples
11
Power Supply Recommendations
12
Layout
12.1
Layout Guidelines
12.2
Layout Examples
13
Device and Documentation Support
13.1
Device Support
13.1.1
サード・パーティ製品に関する免責事項
13.1.2
Development Support
13.1.2.1
Custom Design With WEBENCH® Tools
13.1.3
Export Control Notice
13.2
Documentation Support
13.2.1
Related Documentation
13.3
ドキュメントの更新通知を受け取る方法
13.4
サポート・リソース
13.5
Trademarks
13.6
静電気放電に関する注意事項
13.7
用語集
14
Mechanical, Packaging, and Orderable Information
パッケージ・オプション
メカニカル・データ(パッケージ|ピン)
RTE|16
MPQF149D
サーマルパッド・メカニカル・データ
RTE|16
QFND630A
発注情報
jajsk70b_oa
jajsk70b_pm
8.6
Typical Characteristics
Figure 8-1
BIAS Shutdown Current vs V
BIAS
Figure 8-3
BIAS Operating Current vs Temperature
Figure 8-5
V
VCC
vs I
VCC
Figure 8-7
EN Threshold vs Temperature
Figure 8-9
FB Reference vs Temperature
Figure 8-11
Frequency vs Temperature
Figure 8-13
Peak Current Limit vs Duty Cycle
Figure 8-15
Minimum On Time vs Frequency
Figure 8-2
BIAS Shutdown Current vs Temperature
Figure 8-4
V
VCC
vs V
BIAS
Figure 8-6
I
SS
vs Temperature
Figure 8-8
UVLO Threshold vs Temperature
Figure 8-10
Frequency vs RT Resistance
Figure 8-12
Current Limit Threshold vs Temperature
Figure 8-14
Internal MOSFET Drain Source On-state Resistance vs Temperature
Figure 8-16
Maximum Duty Cycle Limit vs Frequency