JAJSGD4C July   2015  – October 2018 LM5160-Q1

PRODUCTION DATA.  

  1. 1 特長
  2. 2 アプリケーション
  3. 3 概要
    1.     Device Images
      1.      代表的な同期整流降圧アプリケーション回路
      2.      代表的なFly-Buckアプリケーション回路
  4. 4 改訂履歴
  5. 5 概要（続き）
  6. 6 Pin Configuration and Functions
    1.     Pin Functions
  7. 7 Specifications
    1. 7.1 Absolute Maximum Ratings
    2. 7.2 ESD Ratings
    3. 7.3 Recommended Operating Conditions
    4. 7.4 Thermal Information
    5. 7.5 Electrical Characteristics
    6. 7.6 Switching Characteristics
    7. 7.7 Typical Characteristics
  8. 8 Detailed Description
    1. 8.1 Overview
    2. 8.2 Functional Block Diagram
    3. 8.3 Feature Description
      1. 8.3.1  Control Circuit
      2. 8.3.2  VCC Regulator
      3. 8.3.3  Regulation Comparator
      4. 8.3.4  Soft Start
      5. 8.3.5  Error Amplifier
      6. 8.3.6  On-Time Generator
      7. 8.3.7  Current Limit
      8. 8.3.8  N-Channel Buck Switch and Driver
      9. 8.3.9  Synchronous Rectifier
      10. 8.3.10 Enable / Undervoltage Lockout (EN/UVLO)
      11. 8.3.11 Thermal Protection
    4. 8.4 Device Functional Modes
      1. 8.4.1 Forced Pulse Width Modulation (FPWM) Mode
      2. 8.4.2 Undervoltage Detector
  9. 9 Application and Implementation
    1. 9.1 Application Information
      1. 9.1.1 Ripple Configuration
    2. 9.2 Typical Applications
      1. 9.2.1 LM5160-Q1 Synchronous Buck (10-V to 60-V Input, 5-V Output, 1.5-A Load)
        1. 9.2.1.1 Design Requirements
        2. 9.2.1.2 Detailed Design Procedure
          1. 9.2.1.2.1  Custom Design With WEBENCH® Tools
          2. 9.2.1.2.2  Feedback Resistor Divider - RFB1, RFB2
          3. 9.2.1.2.3  Switching Frequency - RON
          4. 9.2.1.2.4  Inductor - L
          5. 9.2.1.2.5  Output Capacitor - COUT
          6. 9.2.1.2.6  Series Ripple Resistor - RESR
          7. 9.2.1.2.7  VCC and Bootstrap Capacitors - CVCC, CBST
          8. 9.2.1.2.8  Input Capacitor - CIN
          9. 9.2.1.2.9  Soft-Start Capacitor - CSS
          10. 9.2.1.2.10 EN/UVLO Resistors - RUV1, RUV2
        3. 9.2.1.3 Application Curves
      2. 9.2.2 LM5160-Q1 Isolated Fly-Buck (18-V to 32-V Input, 12-V, 4.5-W Isolated Output)
        1. 9.2.2.1 LM5160-Q1 Fly-Buck Design Requirements
        2. 9.2.2.2 Detailed Design Procedure
          1. 9.2.2.2.1 Selection of VOUT1 and Turns Ratio
          2. 9.2.2.2.2 Secondary Rectifier Diode
          3. 9.2.2.2.3 External Ripple Circuit
          4. 9.2.2.2.4 Output Capacitor - COUT2
        3. 9.2.2.3 Application Curves
    3. 9.3 Do's and Don'ts
  10. 10Power Supply Recommendations
  11. 11Layout
    1. 11.1 Layout Guidelines
    2. 11.2 Layout Example
  12. 12デバイスおよびドキュメントのサポート
    1. 12.1 デバイス・サポート
      1. 12.1.1 デベロッパー・ネットワークの製品に関する免責事項
      2. 12.1.2 開発サポート
        1. 12.1.2.1 WEBENCH®ツールによるカスタム設計
    2. 12.2 ドキュメントのサポート
      1. 12.2.1 関連資料
    3. 12.3 ドキュメントの更新通知を受け取る方法
    4. 12.4 コミュニティ・リソース
    5. 12.5 商標
    6. 12.6 静電気放電に関する注意事項
    7. 12.7 Glossary
  13. 13メカニカル、パッケージ、および注文情報

パッケージ・オプション

メカニカル・データ（パッケージ｜ピン）
サーマルパッド・メカニカル・データ
発注情報

8.3.9 Synchronous Rectifier

The LM5160-Q1 provides an internal low-side synchronous rectifier N-channel FET. This low-side FET provides a low resistance path for the inductor current when the high-side FET is turned off.

With the FPWM pin connected to ground or left floating, the LM5160-Q1 synchronous rectifier operates in diode emulation mode. Diode emulation enables the pulse-skipping during light load conditions. This leads to a reduction in the average switching frequency at light loads. Switching losses and FET gate driver losses, both of which are proportional to switching frequency, are significantly reduced and efficiency is improved. This pulse-skipping mode also reduces the circulating inductor currents and losses associated with a continuous conduction mode (CCM).

When FPWM is pulled high, diode emulation is disabled. The inductor current can flow in either direction through the low-side FET, resulting in CCM operation with nearly constant switching frequency. A negative sink current limit circuit limits the current that can flow into SW and through the low-side FET to ground. In a buck regulator application, large negative current typically only flows from VOUT to SW if VOUT is lifted above the output regulation setpoint.