JAJSE93B
March 2016 – November 2017
LM5161
PRODUCTION DATA.
1
特長
2
アプリケーション
3
概要
Device Images
代表的な降圧アプリケーション回路
代表的なFly-Buckアプリケーション回路
4
改訂履歴
5
Pin Configuration and Functions
Pin Functions
6
Specifications
6.1
Absolute Maximum Ratings
6.2
ESD Ratings
6.3
Recommended Operating Conditions
6.4
Thermal Information
6.5
Electrical Characteristics
6.6
Switching Characteristics
6.7
Typical Characteristics
7
Detailed Description
7.1
Overview
7.2
Functional Block Diagram
7.3
Feature Description
7.3.1
Control Circuit
7.3.2
VCC Regulator
7.3.3
Regulation Comparator
7.3.4
Soft-Start
7.3.5
Error Transconductance (GM) Amplifier
7.3.6
On-Time Generator
7.3.7
Current Limit
7.3.8
N-Channel Buck Switch and Driver
7.3.9
Synchronous Rectifier
7.3.10
Enable / Undervoltage Lockout (EN/UVLO)
7.3.11
Thermal Protection
7.4
Device Functional Modes
7.4.1
Forced Pulse Width Modulation (FPWM) Mode
7.4.2
Undervoltage Detector
8
Applications and Implementation
8.1
Application Information
8.2
Typical Applications
8.2.1
LM5161 Synchronous Buck (15-V to 95-V Input, 12-V Output, 1-A Load)
8.2.1.1
Design Requirements
8.2.1.2
Detailed Design Procedure
8.2.1.2.1
Custom Design With WEBENCH® Tools
8.2.1.2.2
Output Resistor Divider Selection
8.2.1.2.3
Frequency Selection
8.2.1.2.4
Inductor Selection
8.2.1.2.5
Output Capacitor Selection
8.2.1.2.6
Series Ripple Resistor - RESR (FPWM = 1)
8.2.1.2.7
VCC and Bootstrap Capacitor
8.2.1.2.8
Input Capacitor Selection
8.2.1.2.9
Soft-Start Capacitor Selection
8.2.1.2.10
EN/UVLO Resistor Selection
8.2.1.3
Application Curves
8.2.2
LM5161 Isolated Fly-Buck (36-V to 72-V Input, 12-V, 12-W Isolated Output)
8.2.2.1
LM5161 Fly-Buck Design Requirements
8.2.2.2
Detailed Design Procedure
8.2.2.2.1
Selection of VOUT and Turns Ratio
8.2.2.2.2
Secondary Rectifier Diode
8.2.2.2.3
External Ripple Circuit
8.2.2.2.4
Output Capacitor (CVISO)
8.2.2.3
Application Curves
8.2.3
Ripple Configuration
8.3
Do's and Don'ts
9
Power Supply Recommendations
10
Layout
10.1
Layout Guidelines
10.2
Layout Example
11
デバイスおよびドキュメントのサポート
11.1
WEBENCH®ツールによるカスタム設計
11.2
関連資料
11.3
ドキュメントの更新通知を受け取る方法
11.4
コミュニティ・リソース
11.5
商標
11.6
静電気放電に関する注意事項
11.7
Glossary
12
メカニカル、パッケージ、および注文情報
パッケージ・オプション
メカニカル・データ(パッケージ|ピン)
PWP|14
MPDS370A
サーマルパッド・メカニカル・データ
PWP|14
PPTD287A
発注情報
jajse93b_oa
jajse93b_pm
8.2.1.3
Application Curves
Figure 26.
Load Regulation
Figure 27.
Efficiency vs I
OUT
(FPWM = 1)
Figure 28.
EN/UVLO Start-up at V
IN
= 48 V and I
OUT
= 1 A
Figure 30.
EN/UVLO Start-up at V
IN
= 48 V and R
LOAD
= 12 Ω at FPWM = 1
Figure 32.
Load Transient (0 A - 1 A) at V
IN
= 48 V
at FPWM = 1
Figure 29.
Pre-Bias (11.5 V) Start-up at V
IN
= 48 V at No Load & FPWM = 1
Figure 31.
Load Transient (0 A - 1 A) at V
IN
= 48 V
at FPWM = 0
Figure 33.
Output Short-Circuit at V
IN
= 48 V
(Full Load to Short)