JAJSKV7A June   2021  – September 2022 LM5168-Q1 , LM5169-Q1

PRODUCTION DATA  

  1. 1 特長
  2. 2 アプリケーション
  3. 3 概要
  4. 4 Revision History
  5. 5 Device Comparison Table
  6. 6 Pin Configuration and Functions
  7. 7 Specifications
    1. 7.1 Absolute Maximum Ratings
    2. 7.2 ESD Ratings
    3. 7.3 Recommended Operating Conditions
    4. 7.4 Thermal Information
    5. 7.5 Electrical Characteristics
    6. 7.6 Typical Characteristics
  8. 8 Detailed Description
    1. 8.1 Overview
    2. 8.2 Functional Block Diagram
    3. 8.3 Feature Description
      1. 8.3.1  Control Architecture
      2. 8.3.2  Internal VCC Regulator and Bootstrap Capacitor
      3. 8.3.3  Internal Soft Start
      4. 8.3.4  On-Time Generator
      5. 8.3.5  Current Limit
      6. 8.3.6  N-Channel Buck Switch and Driver
      7. 8.3.7  Synchronous Rectifier
      8. 8.3.8  Enable, Undervoltage Lockout (EN/UVLO)
      9. 8.3.9  Power Good (PGOOD)
      10. 8.3.10 Thermal Protection
    4. 8.4 Device Functional Modes
      1. 8.4.1 Shutdown Mode
      2. 8.4.2 Active Mode
      3. 8.4.3 Sleep Mode
  9. 9 Application and Implementation
    1. 9.1 Application Information
    2. 9.2 Typical Fly-Buck™ Converter Application
      1. 9.2.1 Design Requirements
      2. 9.2.2 Detailed Design Procedure
        1. 9.2.2.1  Switching Frequency (RT)
        2. 9.2.2.2  Transformer Selection
        3. 9.2.2.3  Output Capacitor Selection
        4. 9.2.2.4  Secondary Output Diode
        5. 9.2.2.5  Setting Output Voltage
        6. 9.2.2.6  Input Capacitor
        7. 9.2.2.7  Type-3 Ripple Network
        8. 9.2.2.8  CBST Selection
        9. 9.2.2.9  Minimum Secondary Output Load
        10. 9.2.2.10 Example Design Summary
      3. 9.2.3 Application Curves
    3. 9.3 Typical Buck Application
      1. 9.3.1 Design Requirements
      2. 9.3.2 Detailed Design Procedure
        1. 9.3.2.1 Switching Frequency (RT)
        2. 9.3.2.2 Buck Inductor Selection
        3. 9.3.2.3 Setting the Output Voltage
        4. 9.3.2.4 Type-3 Ripple Network
        5. 9.3.2.5 Output Capacitor Selection
        6. 9.3.2.6 Input Capacitor Considerations
        7. 9.3.2.7 CBST Selection
        8. 9.3.2.8 Example Design Summary
      3. 9.3.3 Application Curves
    4. 9.4 Power Supply Recommendations
    5. 9.5 Layout
      1. 9.5.1 Thermal Considerations
      2. 9.5.2 Typical EMI Results
      3. 9.5.3 Layout Guidelines
        1. 9.5.3.1 Compact PCB Layout for EMI Reduction
        2. 9.5.3.2 Feedback Resistors
      4. 9.5.4 Layout Example
  10. 10Device and Documentation Support
    1. 10.1 Device Support
      1. 10.1.1 Third-Party Products Disclaimer
    2. 10.2 Documentation Support
      1. 10.2.1 Related Documentation
    3. 10.3 Receiving Notification of Documentation Updates
    4. 10.4 サポート・リソース
    5. 10.5 Trademarks
    6. 10.6 Electrostatic Discharge Caution
    7. 10.7 Glossary
  11. 11Mechanical, Packaging, and Orderable Information

パッケージ・オプション

メカニカル・データ（パッケージ｜ピン）
サーマルパッド・メカニカル・データ
発注情報

7.5 Electrical Characteristics

TJ = –40°C to +150°C, VIN = 4.5 V to 120 V. Typical values are at TJ = 25°C and VIN = 24 V (unless otherwise noted)
PARAMETER TEST CONDITIONS MIN TYP MAX UNIT
SUPPLY
IQ(VIN) VIN quiescent current VEN = 2.5 V, PWM Operation 420 880 µA
VEN = 2.5 V, PFM Operation 10 25 µA
IQ(STANDBY) VIN standby current - LDO only VEN = 1.25 V 17 35 µA
ISD(VIN) VIN shutdown supply current VEN = 0 V, Tj=25°C 3 6 µA
ENABLE
VEN(R) EN voltage rising threshold EN rising, enable switching 1.45 1.5 1.55 V
VEN(F) EN voltage falling threshold EN falling, disable switching 1.35 1.4 1.44 V
VSD(R) EN standby rising threshold EN rising, enable internal LDO, no switching.  1.1 V
VSD(F) EN standby falling threshold EN falling, disable internal LDO. 0.45 V
REFERENCE VOLTAGE
VFB FB voltage VFB falling 1.181 1.2 1.218 V
STARTUP
tSS Internal fixed soft-start time 1.75 3 4.75 ms
POWER STAGE
RDSON(HS) High-side MOSFET on-resistance ISW = –100 mA 1.91 Ω
RDSON(LS) Low-side MOSFET on-resistance ISW = 100 mA 0.74 Ω
tON(min) Minimum ON pulse width 50 ns
tON(1) On-time1 VVIN = 6 V, RRT = 75 kΩ 5000 ns
tON(2) On-time2 VVIN = 6 V, RRT = 25 kΩ 1650 ns
tON(3) On-time3 VVIN = 12 V, RRT = 75 kΩ 2550 ns
tON(4) On-time4 VVIN = 12 V, RRT = 25 kΩ 830 ns
tOFF(min) Minimum OFF pulse width 50 ns
BOOT CIRCUIT
VBOOT-SW(UV_R) BOOT-SW UVLO rising threshold VBOOT-SW rising 2.6 3.4 V
OVERCURRENT PROTECTION
IHS_PK(OC) High-side peak current limit LM5168 0.356 0.42 0.484 A
LM5169 0.71 0.84 0.94 A
ILS_PK(OC) Low-side peak current limit LM5168 0.356 0.42 0.484 A
LM5169 0.71 0.84 0.94 A
IDELTA(OC) Min of IHS_PK(OC) or ILS_PK(OC)  minus ILS_V(OC) LM5168 0.084 A
LM5169  0.168 A
ILS(NOC) Low-side negative current limit LM5169 1.05 1.5 1.90 A
LM5168 0.4 0.75 1.1 A
ILS_V(OC) Low-side valley current limit LM5169 Low-side valley current limit on LS FET 0.569 0.672 0.775 A
LM5168 Low-side valley current limit on LS FET 0.27 0.336 0.42 A
IZC Zero-cross detection current threshold 0 A
TW Hiccup time before re-start 64 ms
POWER GOOD
VPGTH Power Good threshold FB falling, PG high to low 1.055 1.08 1.1 V
FB rising, PG low to high 1.105 1.14 1.175 V
RPG Power Good threshold VFB = 1 V 7 Ω
THERMAL SHUTDOWN
TJ(SD) Thermal shutdown threshold (1) Temperature rising 175 °C
TJ(HYS) Thermal shutdown hysteresis (1) 10 °C
(1) Specified by design, not product tested