JAJSNH1A December   2021  – September 2022 LM5168 , LM5169

PRODUCTION DATA  

  1. 特長
  2. アプリケーション
  3. 概要
  4. Revision History
  5. Device Comparison Table
  6. Pin Configuration and Functions
  7. Specifications
    1. 7.1 Absolute Maximum Ratings
    2. 7.2 ESD Ratings
    3. 7.3 Recommended Operating Conditions
    4. 7.4 Thermal Information
    5. 7.5 Electrical Characteristics
    6. 7.6 Typical Characteristics
  8. Detailed Description
    1. 8.1 Overview
    2. 8.2 Functional Block Diagram
    3. 8.3 Feature Description
      1. 8.3.1  Control Architecture
      2. 8.3.2  Internal VCC Regulator and Bootstrap Capacitor
      3. 8.3.3  Internal Soft Start
      4. 8.3.4  On-Time Generator
      5. 8.3.5  Current Limit
      6. 8.3.6  N-Channel Buck Switch and Driver
      7. 8.3.7  Synchronous Rectifier
      8. 8.3.8  Enable, Undervoltage Lockout (EN/UVLO)
      9. 8.3.9  Power Good (PGOOD)
      10. 8.3.10 Thermal Protection
    4. 8.4 Device Functional Modes
      1. 8.4.1 Shutdown Mode
      2. 8.4.2 Active Mode
      3. 8.4.3 Sleep Mode
  9. Application and Implementation
    1. 9.1 Application Information
    2. 9.2 Typical Fly-Buck™ Converter Application
      1. 9.2.1 Design Requirements
      2. 9.2.2 Detailed Design Procedure
        1. 9.2.2.1  Switching Frequency (RT)
        2. 9.2.2.2  Transformer Selection
        3. 9.2.2.3  Output Capacitor Selection
        4. 9.2.2.4  Secondary Output Diode
        5. 9.2.2.5  Setting Output Voltage
        6. 9.2.2.6  Input Capacitor
        7. 9.2.2.7  Type-3 Ripple Network
        8. 9.2.2.8  CBST Selection
        9. 9.2.2.9  Minimum Secondary Output Load
        10. 9.2.2.10 Example Design Summary
      3. 9.2.3 Application Curves
    3. 9.3 Typical Buck Application
      1. 9.3.1 Design Requirements
      2. 9.3.2 Detailed Design Procedure
        1. 9.3.2.1 Switching Frequency (RT)
        2. 9.3.2.2 Buck Inductor Selection
        3. 9.3.2.3 Setting the Output Voltage
        4. 9.3.2.4 Type-3 Ripple Network
        5. 9.3.2.5 Output Capacitor Selection
        6. 9.3.2.6 Input Capacitor Considerations
        7. 9.3.2.7 CBST Selection
        8. 9.3.2.8 Example Design Summary
      3. 9.3.3 Application Curves
    4. 9.4 Power Supply Recommendations
    5. 9.5 Layout
      1. 9.5.1 Thermal Considerations
      2. 9.5.2 Typical EMI Results
      3. 9.5.3 Layout Guidelines
        1. 9.5.3.1 Compact PCB Layout for EMI Reduction
        2. 9.5.3.2 Feedback Resistors
      4. 9.5.4 Layout Example
  10. 10Device and Documentation Support
    1. 10.1 Device Support
      1. 10.1.1 Third-Party Products Disclaimer
    2. 10.2 Documentation Support
      1. 10.2.1 Related Documentation
    3. 10.3 Receiving Notification of Documentation Updates
    4. 10.4 サポート・リソース
    5. 10.5 Trademarks
    6. 10.6 Electrostatic Discharge Caution
    7. 10.7 Glossary
  11. 11Mechanical, Packaging, and Orderable Information

パッケージ・オプション

メカニカル・データ(パッケージ|ピン)
サーマルパッド・メカニカル・データ
発注情報

Current Limit

The LM5168P manages overcurrent conditions with cycle-by-cycle current limiting of the peak inductor current. The current sensed in the high-side MOSFET is compared every switching cycle to the current limit threshold (0.42 A typical). To protect the converter from potential current runaway conditions, the LM5168P includes a fold-back valley current limit feature, set at 0.34 A, that is enabled if a peak current limit is detected. As shown in Figure 8-1, if the peak current in the high-side MOSFET exceeds 0.42 A for the LM5168P (typical), the present cycle is immediately terminated regardless of the programmed on time (tON), the high-side MOSFET is turned off and the fold-back valley current limit is activated. The low-side MOSFET remains on until the inductor current drops below this fold-back valley current limit, after which the next on-pulse is initiated. This method folds back the switching frequency to prevent overheating and limits the average output current to less than 0.3 A for LM5168P to ensure proper short-circuit and heavy-load protection.

GUID-D2461D78-CDF2-46E5-B34B-3424EBBE8EF8-low.gifFigure 8-1 Current Limit Timing Diagram

Current is sensed after a leading-edge blanking time following the high-side MOSFET turn-on transition. The propagation delay of the current limit comparator is 100 ns. During high step-down conditions when the on time is less than 100 ns, a backup peak current limit comparator in the low-side FET also set at 0.84 A or 0.42 A, enables the foldback valley current limit set at 0.67 A or 0.34 A. This innovative current limit scheme enables ultra-low duty-cycle operation, permitting large step-down voltage conversions while ensuring robust protection of the converter.

The LM5168F, LM5169F, and LM5169P implement a current limit off-timer and hiccup protection. If the current in the high-side MOSFET exceeds IHS_PK(OC), the high-side MOSFET is immediately turned off and a non-resettable off-timer is initiated. The length of the off time is controlled by the feedback voltage and the input voltage. The off-timer ensures safe short circuit operation in a fly-buck converter configuration. An overload current on the secondary output can result in the secondary voltage collapsing while the primary voltage remains in regulation. This action results in a possible condition where the secondary output voltage does not recover after the overload condition. Hiccup protection makes sure a soft-start counter enables both the secondary and primary output voltages to recover properly after an overcurrent event is detected for 16 consecutive current limit cycles. After four consecutive cycles without current limit detection, restart the hiccup protection counter. These devices attempt soft start after a "hiccup period" of 64 ms.