Loading [MathJax]/jax/output/SVG/fonts/TeX/fontdata.js
Menu
Product
Email
PDF
Order now
LM5170 マルチフェーズ双方向電流コントローラ (Rev. B 翻訳版)
JAJSIA0B
December 2019 – August 2021
LM5170
PRODUCTION DATA
CONTENTS
SEARCH
LM5170 マルチフェーズ双方向電流コントローラ (Rev. B 翻訳版)
1
特長
2
アプリケーション
3
概要
4
Revision History
5
概要 (続き)
6
Pin Configuration and Functions
7
Specifications
7.1
Absolute Maximum Ratings
7.2
ESD Ratings
7.3
Recommended Operating Conditions
7.4
Thermal Information
7.5
Electrical Characteristics
7.6
Typical Characteristics
8
Detailed Description
8.1
Overview
8.2
Functional Block Diagram
8.3
Feature Description
8.3.1
Bias Supply (VCC, VCCA)
8.3.2
Undervoltage Lockout (UVLO) and Master Enable or Disable
8.3.3
High Voltage Input (VIN, VINX)
8.3.4
Current Sense Amplifier
8.3.5
Control Commands
8.3.5.1
Channel Enable Commands (EN1, EN2)
8.3.5.2
Direction Command (DIR)
8.3.5.3
Channel Current Setting Commands (ISETA or ISETD)
8.3.6
Channel Current Monitor (IOUT1, IOUT2)
8.3.7
Cycle-by-Cycle Peak Current Limit (IPK)
8.3.8
Error Amplifier
8.3.9
Ramp Generator
8.3.10
Soft Start
8.3.10.1
Soft-Start Control by the SS Pin
8.3.10.2
Soft Start by MCU Through the ISET Pin
8.3.10.3
The SS Pin as the Restart Timer
8.3.11
Gate Drive Outputs, Dead Time Programming, and Adaptive Dead Time (HO1, HO2, LO1, LO2, DT)
8.3.12
PWM Comparator
8.3.13
Oscillator (OSC)
8.3.14
Synchronization to an External Clock (SYNCIN, SYNCOUT)
8.3.15
Diode Emulation
8.3.16
Power MOSFET Failure Detection and Failure Protection (nFAULT, BRKG, BRKS)
8.3.16.1
Failure Detection Selection at the SYNCOUT Pin
8.3.16.2
Nominal Circuit Breaker Function
8.3.17
Overvoltage Protection (OVPA, OVPB)
8.3.17.1
HV-V- Port OVP (OVPA)
8.3.17.2
LV-Port OVP (OVPB)
8.4
Device Functional Modes
8.4.1
Multiphase Configurations (SYNCOUT, OPT)
8.4.1.1
Multiphase in Star Configuration
8.4.1.2
Configuration of 2, 3, or 4 Phases in Master-Slave Daisy-Chain Configurations
8.4.1.3
Configuration of 6 or 8 Phases in Master-Slave Daisy-Chain Configurations
8.4.2
Multiphase Total Current Monitoring
8.5
Programming
8.5.1
Dynamic Dead Time Adjustment
8.5.2
Optional UVLO Programming
9
Application and Implementation
9.1
Application Information
9.1.1
Typical Key Waveforms
9.1.1.1
Typical Power-Up Sequence
9.1.1.2
One to Eight Phase Programming
9.1.2
Inner Current Loop Small Signal Models
9.1.2.1
Small Signal Model
9.1.2.2
Inner Current Loop Compensation
9.1.3
Compensating for the Non-Ideal Current Sense Resistor
9.1.4
Outer Voltage Loop Control
9.2
Typical Application
9.2.1
60-A, Dual-Phase, 48-V to 12-V Bidirectional Converter
9.2.1.1
Design Requirements
9.2.1.2
Detailed Design Procedure
9.2.1.2.1
Determining the Duty Cycle
9.2.1.2.2
Oscillator Programming
9.2.1.2.3
Power Inductor, RMS and Peak Currents
9.2.1.2.4
Current Sense (RCS)
9.2.1.2.5
Current Setting Limits (ISETA or ISETD)
9.2.1.2.6
Peak Current Limit
9.2.1.2.7
Power MOSFETS
9.2.1.2.8
Bias Supply
9.2.1.2.9
Bootstrap
9.2.1.2.10
RAMP Generators
9.2.1.2.11
OVP
9.2.1.2.12
Dead Time
9.2.1.2.13
IOUT Monitors
9.2.1.2.14
UVLO Pin Usage
9.2.1.2.15
VIN Pin Configuration
9.2.1.2.16
Loop Compensation
9.2.1.2.17
Soft Start
9.2.1.2.18
ISET Pins
9.2.1.3
Application Curves
10
Power Supply Recommendations
11
Layout
11.1
Layout Guidelines
11.2
Layout Examples
12
Device and Documentation Support
12.1
Device Support
12.1.1
Development Support
12.2
Receiving Notification of Documentation Updates
12.3
サポート・リソース
12.4
Trademarks
12.5
Electrostatic Discharge Caution
12.6
Glossary
13
Mechanical, Packaging, and Orderable Information
重要なお知らせ
パッケージ・オプション
メカニカル・データ（パッケージ｜ピン）
PHP|48
MPQF051B
サーマルパッド・メカニカル・データ
PHP|48
PPTD117D
発注情報
jajsia0b_oa
jajsia0b_pm
search
No matches found.
Full reading width
Full reading width
Comfortable reading width
Expanded reading width
Card for each section
Card with all content
