JAJSIR9C March   2020  – June 2021 LM61440-Q1

PRODUCTION DATA  

  1. 特長
  2. アプリケーション
  3. 概要
  4. Revision History
  5. Description (continued)
  6. Device Comparison Table
  7. Pin Configuration and Functions
  8. Specifications
    1. 8.1 Absolute Maximum Ratings
    2. 8.2 ESD Ratings
    3. 8.3 Recommended Operating Conditions
    4. 8.4 Thermal Information
    5. 8.5 Electrical Characteristics
    6. 8.6 Timing Characteristics
    7. 8.7 Systems Characteristics
    8. 8.8 Typical Characteristics
  9. Detailed Description
    1. 9.1 Overview
    2. 9.2 Functional Block Diagram
    3. 9.3 Feature Description
      1. 9.3.1  EN/SYNC Uses for Enable and VIN UVLO
      2. 9.3.2  EN/SYNC Pin Uses for Synchronization
      3. 9.3.3  Clock Locking
      4. 9.3.4  Adjustable Switching Frequency
      5. 9.3.5  PGOOD Output Operation
      6. 9.3.6  Internal LDO, VCC UVLO, and BIAS Input
      7. 9.3.7  Bootstrap Voltage and VCBOOT-UVLO (CBOOT Pin)
      8. 9.3.8  Adjustable SW Node Slew Rate
      9. 9.3.9  Spread Spectrum
      10. 9.3.10 Soft Start and Recovery From Dropout
      11. 9.3.11 Output Voltage Setting
      12. 9.3.12 Overcurrent and Short Circuit Protection
      13. 9.3.13 Thermal Shutdown
      14. 9.3.14 Input Supply Current
    4. 9.4 Device Functional Modes
      1. 9.4.1 Shutdown Mode
      2. 9.4.2 Standby Mode
      3. 9.4.3 Active Mode
        1. 9.4.3.1 CCM Mode
        2. 9.4.3.2 Auto Mode - Light Load Operation
          1. 9.4.3.2.1 Diode Emulation
          2. 9.4.3.2.2 Frequency Reduction
        3. 9.4.3.3 FPWM Mode - Light Load Operation
        4. 9.4.3.4 Minimum On-time (High Input Voltage) Operation
        5. 9.4.3.5 Dropout
  10. 10Application and Implementation
    1. 10.1 Application Information
    2. 10.2 Typical Application
      1. 10.2.1 Design Requirements
      2. 10.2.2 Detailed Design Procedure
        1. 10.2.2.1  Choosing the Switching Frequency
        2. 10.2.2.2  Setting the Output Voltage
        3. 10.2.2.3  Inductor Selection
        4. 10.2.2.4  Output Capacitor Selection
        5. 10.2.2.5  Input Capacitor Selection
        6. 10.2.2.6  BOOT Capacitor
        7. 10.2.2.7  BOOT Resistor
        8. 10.2.2.8  VCC
        9. 10.2.2.9  BIAS
        10. 10.2.2.10 CFF and RFF Selection
        11. 10.2.2.11 External UVLO
      3. 10.2.3 Application Curves
  11. 11Power Supply Recommendations
  12. 12Layout
    1. 12.1 Layout Guidelines
      1. 12.1.1 Ground and Thermal Considerations
    2. 12.2 Layout Example
  13. 13Device and Documentation Support
    1. 13.1 Documentation Support
      1. 13.1.1 Related Documentation
    2. 13.2 Receiving Notification of Documentation Updates
    3. 13.3 サポート・リソース
    4. 13.4 Trademarks
    5. 13.5 静電気放電に関する注意事項
    6. 13.6 用語集
  14. 14Mechanical, Packaging, and Orderable Information

パッケージ・オプション

メカニカル・データ(パッケージ|ピン)
サーマルパッド・メカニカル・データ
発注情報

Soft Start and Recovery From Dropout

The LM61440-Q1 uses a reference-based soft start that prevents output voltage overshoots and large inrush currents during start-up. Soft start is triggered by any of the following conditions:

  • Power is applied to the VIN pin of the IC, releasing UVLO.
  • EN is used to turn on the device.
  • Recovery from a hiccup waiting period
  • Recovery from shutdown due to overtemperature protection

Once soft start is triggered, the IC takes the following actions:

  • The reference used by the IC to regulate output voltage is slowly ramped. The net result is that output voltage takes tSS to reach 90% of its desired value.
  • Operating mode is set to auto, activating diode emulation. This allows start-up without pulling output low if there is a voltage already present on output.

These actions together provide start-up with limited inrush currents and also allow the use of larger output capacitors and higher loading conditions that cause current to border on current limit during start-up without triggering hiccup. See Figure 9-8.

GUID-28290E33-CB50-44CD-9E2C-A80D30F15283-low.gif
Soft start works with both output voltages starting from 0 V on the left curves, or if there is already voltage on the output, as shown on right. In either case, output voltage must reach within 10% of the desired value tSS after soft start is initiated. During soft start, FPWM and hiccup are disabled. Both hiccup and FPWM are enabled once output reaches regulation or tSS2, whichever happens first.
Figure 9-8 Soft-Start Operation

Any time the output voltage falls more than a few percent, the output voltage ramps up slowly. This condition is called recovery from dropout and differs from soft start in three important ways:

  • The reference voltage is set to approximately 1% above what is needed to achieve the existing output voltage.
  • Hiccup is allowed if output voltage is less than 0.4 times its set point. Note that during dropout regulation itself, hiccup is inhibited.
  • FPWM mode is allowed during recovery from dropout. If the output voltage were to suddenly be pulled up by an external supply, the LM61440-Q1 can pull down on the output.

Despite being called recovery from dropout, this feature is active whenever output voltage drops to a few percent lower than the set point. This primarily occurs under the following conditions:

  • Dropout: When there is insufficient input voltage for the desired output voltage to be generated
  • Overcurrent: When there is an overcurrent event that is not severe enough to trigger hiccup
GUID-339A5F87-EC58-49D5-9D73-7E4F9B7BD4AD-low.gif
Whether output voltage falls due to high load or low input voltage, once the condition that causes output to fall below its set point is removed, the output climbs at the same speed as during start-up. Even though hiccup does not trigger due to dropout, it can, in principle, be triggered during recovery if output voltage is below 0.4 times the output set point for more than 128 clock cycles.
Figure 9-9 Recovery From Dropout
GUID-E4B1ACB3-0B87-4E7B-AA5C-9A8783C44764-low.gifFigure 9-10 Recovery From Dropout (VOUT = 5 V, IOUT = 4 A, VIN = 13.5 V to 4 V to 13.5 V)