JAJSJT2D February 2020 – August 2021 LM61480-Q1 , LM61495-Q1 , LM62460-Q1
PRODUCTION DATA
The ceramic input capacitors provide a low impedance source to the regulator in addition to supplying the ripple current and isolating switching noise from other circuits. A minimum of 10-μF ceramic capacitance is required on the input of the LM6x4xx-Q1. Use 2 x 10-μF ceramic capacitance or more for better EMI performance. This must be rated for at least the maximum input voltage that the application requires. It is preferable to have twice the maximum input voltage to reduce DC bias derating. This capacitance can be increased to help reduce input voltage ripple and maintain the input voltage during load transients. In addition, a small case size (0603 or 0402) ceramic capacitor must be used at each input/ground pin pair, VIN1/PGND1 and VIN2/PGND2, immediately adjacent to the regulator. The capacitor should have a voltage rating of at least double the maximum input voltage to minimize derating. The capacitor must also have an X7R or better dielectric. Choose the highest capacitor value with these parameters. This provides a high frequency bypass to reduce switch-node ring and electromagnetic interference emissions. The QFN (RJR) package provides two input voltage pins and two power ground pins on opposite sides of the package. This allows the input capacitors to be split and placed optimally with respect to the internal power MOSFETs, thus improving the effectiveness of the input bypassing. This example places two 10-μF, 50-V, 1206, X7R ceramic capacitors and two 0.47-μF, 50-V, 0603, X7R ceramic capacitors at each VIN/PGND pin pair.
Often, it is desirable to use an electrolytic capacitor on the input in parallel with the ceramics. This is especially true if long leads/traces are used to connect the input supply to the regulator. The moderate ESR of this capacitor can help dampen ringing on the input supply caused by the inductance of the long power leads. The use of this additional capacitor also helps with momentary voltage dips caused by input supplies with unusually high impedance.
Most of the input switching current passes through the ceramic input capacitors. The approximate worst case RMS value of this current can be calculated with Equation 7. This value must be checked against the manufacturers' maximum ratings.