JAJSJT2D February   2020  – August 2021 LM61480-Q1 , LM61495-Q1 , LM62460-Q1

PRODUCTION DATA  

  1. 1 特長
  2. 2 アプリケーション
  3. 3 概要
  4. 4 Revision History
  5. 5 Device Comparison Table
  6. 6 Pin Configuration and Functions
  7. 7 Specifications
    1. 7.1 Absolute Maximum Ratings
    2. 7.2 ESD Ratings
    3. 7.3 Recommended Operating Conditions
    4. 7.4 Thermal Information
    5. 7.5 Electrical Characteristics
    6. 7.6 Timing Characteristics
    7. 7.7 Switching Characteristics
    8. 7.8 System Characteristics
    9. 7.9 Typical Characteristics
  8. 8 Detailed Description
    1. 8.1 Overview
    2. 8.2 Functional Block Diagram
    3. 8.3 Feature Description
      1. 8.3.1  Output Voltage Selection
      2. 8.3.2  Enable EN Pin and Use as VIN UVLO
      3. 8.3.3  SYNC/MODE Uses for Synchronization
      4. 8.3.4  Clock Locking
      5. 8.3.5  Adjustable Switching Frequency
      6. 8.3.6  RESET Output Operation
      7. 8.3.7  Internal LDO, VCC UVLO, and BIAS Input
      8. 8.3.8  Bootstrap Voltage and VCBOOT-UVLO (CBOOT Pin)
      9. 8.3.9  Adjustable SW Node Slew Rate
      10. 8.3.10 Spread Spectrum
      11. 8.3.11 Soft Start and Recovery From Dropout
      12. 8.3.12 Overcurrent and Short Circuit Protection
      13. 8.3.13 Hiccup
      14. 8.3.14 Thermal Shutdown
    4. 8.4 Device Functional Modes
      1. 8.4.1 Shutdown Mode
      2. 8.4.2 Standby Mode
      3. 8.4.3 Active Mode
        1. 8.4.3.1 Peak Current Mode Operation
        2. 8.4.3.2 Auto Mode Operation
          1. 8.4.3.2.1 Diode Emulation
        3. 8.4.3.3 FPWM Mode Operation
        4. 8.4.3.4 Minimum On-time (High Input Voltage) Operation
        5. 8.4.3.5 Dropout
        6. 8.4.3.6 Recovery from Dropout
        7. 8.4.3.7 Other Fault Modes
  9. 9 Application and Implementation
    1. 9.1 Application Information
    2. 9.2 Typical Application
      1. 9.2.1 Design Requirements
      2. 9.2.2 Detailed Design Procedure
        1. 9.2.2.1  Choosing the Switching Frequency
        2. 9.2.2.2  Setting the Output Voltage
        3. 9.2.2.3  Inductor Selection
        4. 9.2.2.4  Output Capacitor Selection
        5. 9.2.2.5  Input Capacitor Selection
        6. 9.2.2.6  BOOT Capacitor
        7. 9.2.2.7  BOOT Resistor
        8. 9.2.2.8  VCC
        9. 9.2.2.9  CFF and RFF Selection
        10. 9.2.2.10 RSPSP Selection
        11. 9.2.2.11 RT Selection
        12. 9.2.2.12 RMODE Selection
        13. 9.2.2.13 External UVLO
        14. 9.2.2.14 Maximum Ambient Temperature
      3. 9.2.3 Application Curves
  10. 10Power Supply Recommendations
  11. 11Layout
    1. 11.1 Layout Guidelines
      1. 11.1.1 Ground and Thermal Considerations
    2. 11.2 Layout Example
  12. 12Device and Documentation Support
    1. 12.1 Device Support
      1. 12.1.1 Third-Party Products Disclaimer
    2. 12.2 Receiving Notification of Documentation Updates
    3. 12.3 サポート・リソース
    4. 12.4 Trademarks
    5. 12.5 Glossary
    6. 12.6 Electrostatic Discharge Caution
  13. 13Mechanical, Packaging, and Orderable Information

パッケージ・オプション

メカニカル・データ（パッケージ｜ピン）
サーマルパッド・メカニカル・データ
発注情報

7.8 System Characteristics

The following specifications apply only to the typical application circuit, with nominal component values. Specifications in the typical (TYP) column apply to TJ = 25°C only. Specifications in the minimum (MIN) and maximum (MAX) columns apply to the case of typical components over the temperature range of TJ = –40°C to 150°C. These specifications are not ensured by production testing.
PARAMETER TEST CONDITIONS MIN TYP MAX UNIT
SUPPLY VOLTAGE (VIN PIN)
VVIN_MIN1 Input voltage for full functionality at reduced load, after start-up. 3 V
VVIN_MIN2 Input voltage for full functionality at 100% of maximum rated load, after start-up. VOUT set to 3.3 V 3.95 V
IQ_VIN Input current to VIN node of DC/DC for fixed VOUT versions VIN = 13.5 V, VOUT = 3.3 V fixed, IOUT = 0 A, Auto mode 5 µA
VIN = 13.5 V, VOUT = 5 V fixed, IOUT = 0 A, Auto mode 8
VOLTAGE REFERENCE (FB PIN)
VOUT_5V_ACC VOUT = 5 V, VIN = 6 V to 36 V, IOUT = 1 A to full load (1) VIN = 6 V to 36 V , PWM Operation –1.5 1.5 %
VOUT = 5 V, VIN = 6 V to 36 V, IOUT = 0 A to full load (1) VIN = 6 V to 36 V, PFM and PWM operation –1.5 2.5
VOUT_3r3V_ACC VOUT = 3.3 V, VIN = 3.8 V to 36 V, IOUT = 1 A to full load (1) VIN = 3.8 V to 36 V , PWM Operation –1.5 1.5 %
VOUT = 3.3 V, VIN = 3.8 V to 36 V, IOUT = 0 A to full load (1) VIN = 3.8 V to 36 V, PFM and PWM operation –1.5 2.5
THERMAL SHUTDOWN
TSD_R Thermal shutdown tripping threshold 158 168 180 ºC
TSD_F Thermal shutdown recovery threshold 150 159 ºC
OTHER PARAMATERS
VDROP1 Input to output voltage differential to maintain regulation accuracy, without inductor DCR drop 0.45 V
VDROP2 Input to output voltage differential to maintain fSW ≥ 1.85 MHz, without inductor DCR drop 1.2 V
ƞ Typical 2.2MHz Efficiency VIN =13.5 V, VOUT = 5.0 V, IOUT = 5 A, RRBOOT = 0 Ω 92.6 %
Typical 400 kHz Efficiency VIN = 13.5 V, Vout = 5.0 V, IOUT = 8 A, RRBOOT = 0 Ω 95.1
Typical 250 kHz Efficiency VIN = 13.5 V, Vout = 5.0 V, IOUT = 10 A, RRBOOT = 0 Ω 93.7