JAJSIE0F November   2019  – September 2024 LM63635-Q1

PRODUCTION DATA  

  1.   1
  2. 1 特長
  3. 2 アプリケーション
  4. 3 概要
  5. 4 Device Comparison Table
  6. 5 Pin Configuration and Functions
  7. 6 Specifications
    1. 6.1 Absolute Maximum Ratings
    2. 6.2 ESD Ratings
    3. 6.3 Recommended Operating Conditions
    4. 6.4 Thermal Information
    5. 6.5 Electrical Characteristics
    6. 6.6 Timing Characteristics
    7. 6.7 Switching Characteristics
    8. 6.8 System Characteristics
    9. 6.9 Typical Characteristics
  8. 7 Detailed Description
    1. 7.1 Overview
    2. 7.2 Functional Block Diagram
    3. 7.3 Feature Description
      1. 7.3.1 Sync/Mode Selection
      2. 7.3.2 Output Voltage Selection
      3. 7.3.3 Switching Frequency Selection
        1. 7.3.3.1 Spread Spectrum Option
      4. 7.3.4 Enable and Start-Up
      5. 7.3.5 RESET Flag Output
      6. 7.3.6 Undervoltage Lockout and Thermal Shutdown and Output Discharge
    4. 7.4 Device Functional Modes
      1. 7.4.1 Overview
      2. 7.4.2 Light Load Operation
        1. 7.4.2.1 Sync/FPWM Operation
      3. 7.4.3 Dropout Operation
      4. 7.4.4 Minimum On-time Operation
      5. 7.4.5 Current Limit and Short-Circuit Operation
  9. 8 Application and Implementation
    1. 8.1 Application Information
    2. 8.2 Typical Application
      1. 8.2.1 Design Requirements
      2. 8.2.2 Detailed Design Procedure
        1. 8.2.2.1 Choosing the Switching Frequency
        2. 8.2.2.2 Setting the Output Voltage
          1. 8.2.2.2.1 CFF Selection
        3. 8.2.2.3 Inductor Selection
        4. 8.2.2.4 Output Capacitor Selection
        5. 8.2.2.5 Input Capacitor Selection
        6. 8.2.2.6 CBOOT
        7. 8.2.2.7 VCC
        8. 8.2.2.8 External UVLO
        9. 8.2.2.9 Maximum Ambient Temperature
      3. 8.2.3 Full Feature Design Example
      4. 8.2.4 Application Curves
      5. 8.2.5 EMI Performance Curves
    3. 8.3 Best Design Practices
    4. 8.4 Power Supply Recommendations
    5. 8.5 Layout
      1. 8.5.1 Layout Guidelines
        1. 8.5.1.1 Ground and Thermal Considerations
      2. 8.5.2 Layout Example
  10. 9 Device and Documentation Support
    1. 9.1 Device Support
      1. 9.1.1 Device Nomenclature
    2. 9.2 Documentation Support
      1. 9.2.1 Related Documentation
    3. 9.3 ドキュメントの更新通知を受け取る方法
    4. 9.4 サポート・リソース
    5. 9.5 Trademarks
    6. 9.6 静電気放電に関する注意事項
    7. 9.7 用語集
  11. 10Revision History
  12. 11Mechanical, Packaging, and Orderable Information
    1. 11.1 Tape and Reel Information

パッケージ・オプション

メカニカル・データ（パッケージ｜ピン）
サーマルパッド・メカニカル・データ
発注情報

5 Pin Configuration and Functions

Figure 5-1 16-Pin HTSSOP With PowerPAD™ Integrated Circuit Package,PWP — LM636x5D(Top View)
Figure 5-3 12-Pin WSON With PowerPAD™ Integrated Circuit Package,DRR — LM63635C(Top View)
Figure 5-2 12-Pin WSON With PowerPAD™ Integrated Circuit Package,DRR — LM63635D(Top View)
Table 5-1 Pin Functions
PIN DESCRIPTION
TSSOP
LM63635D		 WSON LM63635D WSON LM63635C NAME TYPE
1, 2 1 1 SW P Regulator switch node. Connect to power inductor.
3 2 2 CBOOT P Bootstrap supply voltage for internal high-side driver. Connect a high-quality, 220nF capacitor from this pin to the SW pin.
4 3 4 VCC A Internal 5V LDO output. Used as supply to internal control circuits. Do not connect to external loads. Can be used as logic supply for regulator functions. Connect a high-quality, 1µF capacitor from this pin to PGND.
5 4 - RT A Frequency programming input. Tie to VCC for 400kHz or to AGND for 2.1MHz or connect to an RT timing resistor. See Section 7.3.3 for details. Do not float.
6 5 - VSEL A Output voltage select input. Tie to VCC for 5V output or to AGND for 3.3V output; connect to a 10kΩ for an adjustable output. See Section 7.3.2 for details. Do not float.
7 6 5 SYNC/MODE A Mode selection and synchronization input. Tie to VCC for FPWM mode, AGND for AUTO mode, or supply an external synchronizing clock to this input.
8 7 6 RESET A Open-drain power-good flag output. Connect to suitable voltage supply through a current limiting resistor. High = power OK, low = power bad. Flag pulls low when EN = Low. Can be open when not used.
9 8 7 FB A Feedback input to regulator. Connect to output capacitor for 5V or 3.3V fixed option or tap point of the feedback voltage divider for ADJ option. Do not float; do not ground.
10 9 9 AGND G Analog ground for regulator and system. Ground reference for internal references and logic. All electrical parameters are measured with respect to this pin. Connect to system ground on PCB.
11 10 10 EN A Enable input to regulator. High = ON, Low = OFF. Can be connected directly to VIN. Do not float.
12, 13 12 12 VIN P Input supply to regulator. Connect a high-quality bypass capacitors directly to this pin and PGND.
14 11 3, 8, 11 NC — No internal connection to device
15, 16 13 13 PGND G Power ground terminal. Connect to system ground and AGND. Connect to bypass capacitor with short wide traces.
17 13 13 DAP G Electrical ground and heat sink connection. Solder directly to system ground plane.
A = Analog, P = Power, G = Ground