The RESET flag function (RESET output pin) of the LM63635C-Q1 device can be used to reset a system microprocessor whenever the output voltage is out of regulation. This open-drain output goes low under fault conditions, such as current limit and thermal shutdown, as well as during normal start-up. A glitch filter prevents false flag operation for short excursions of the output voltage, such as during line and load transients. Output voltage excursions lasting less than t_dg do not trip the RESET flag. After the FB voltage has returned to the regulation value and after a delay of t_rise-delay, the RESET flag goes high. RESET operation can best be understood by reference to Figure 7-3 and Figure 7-4.

The RESET output consists of an open-drain NMOS, requiring an external pullup resistor to a logic supply that can be used. The RESET output can also be pulled up to either VCC or V_OUT through an appropriate resistor, as desired. Pullup resistor values in the range of 10kΩ to 100kΩ are reasonable. If this function is not needed, the RESET pin can be left floating. When EN is pulled low, the flag output is also forced low. With EN low, RESET remains valid as long as the input voltage is ≥ 1.2V (typical). Limit the current into the RESET flag pin to approximately 5mA. The maximum current is internally limited to approximately 50mA when the device is enabled and approximately 65mA when the device is disabled. The internal current limit protects the device from any transient currents that can occur when discharging a filter capacitor connected to this output.

Figure 7-3 Static RESET Operation

Figure 7-4 RESET Timing Behavior