JAJSSF1 January   2024 LM63635C-Q1

PRODUCTION DATA  

  1.   1
  2. 特長
  3. アプリケーション
  4. 概要
  5. Device Comparison Table
  6. Pin Configuration and Functions
  7. Specifications
    1. 6.1 Absolute Maximum Ratings
    2. 6.2 ESD Ratings
    3. 6.3 Recommended Operating Conditions
    4. 6.4 Thermal Information
    5. 6.5 Electrical Characteristics
    6. 6.6 Timing Characteristics
    7. 6.7 Switching Characteristics
    8. 6.8 System Characteristics
    9. 6.9 Typical Characteristics
  8. Detailed Description
    1. 7.1 Overview
    2. 7.2 Functional Block Diagram
    3. 7.3 Feature Description
      1. 7.3.1 Output Voltage Selection
      2. 7.3.2 Switching Frequency Selection
        1. 7.3.2.1 Spread Spectrum Option
      3. 7.3.3 Enable and Start-Up
      4. 7.3.4 RESET Flag Output
      5. 7.3.5 Undervoltage Lockout, Thermal Shutdown, and Output Discharge
    4. 7.4 Device Functional Modes
      1. 7.4.1 Overview
      2. 7.4.2 Light Load Operation
      3. 7.4.3 Dropout Operation
      4. 7.4.4 Minimum On-Time Operation
      5. 7.4.5 Current Limit and Short-Circuit Operation
  9. Application and Implementation
    1. 8.1 Application Information
    2. 8.2 Typical Application
      1. 8.2.1 Design Requirements
      2. 8.2.2 Detailed Design Procedure
        1. 8.2.2.1 Choosing the Switching Frequency
        2. 8.2.2.2 Inductor Selection
        3. 8.2.2.3 Output Capacitor Selection
        4. 8.2.2.4 Input Capacitor Selection
        5. 8.2.2.5 CBOOT
        6. 8.2.2.6 VCC
        7. 8.2.2.7 External UVLO
        8. 8.2.2.8 Maximum Ambient Temperature
      3. 8.2.3 Application Curves
      4. 8.2.4 EMI Performance Curves
    3. 8.3 Best Design Practices
    4. 8.4 Power Supply Recommendations
    5. 8.5 Layout
      1. 8.5.1 Layout Guidelines
        1. 8.5.1.1 Ground and Thermal Considerations
      2. 8.5.2 Layout Example
  10. Device and Documentation Support
    1. 9.1 Device Support
      1. 9.1.1 Device Nomenclature
    2. 9.2 Documentation Support
      1. 9.2.1 Related Documentation
    3. 9.3 ドキュメントの更新通知を受け取る方法
    4. 9.4 サポート・リソース
    5. 9.5 Trademarks
    6. 9.6 用語集
    7. 9.7 静電気放電に関する注意事項
  11. 10Revision History
  12. 11Mechanical, Packaging, and Orderable Information

パッケージ・オプション

メカニカル・データ(パッケージ|ピン)
サーマルパッド・メカニカル・データ
発注情報

Ground and Thermal Considerations

As mentioned above, TI recommends using one of the middle layers as a solid ground plane. A ground plane provides shielding for sensitive circuits and traces. A ground plane also provides a quiet reference potential for the control circuitry. Connect the AGND and PGND pins to the ground planes using vias next to the bypass capacitors. PGND pins are connected directly to the source of the low-side MOSFET switch and also connected directly to the grounds of the input and output capacitors. The PGND net contains noise at the switching frequency and can bounce due to load variations. The PGND trace, as well as the VIN and SW traces, must be constrained to one side of the ground planes. The other side of the ground plane contains much less noise and must be used for sensitive routes.

TI recommends providing adequate device heat sinking by using the thermal pad (DAP) of the device as the primary thermal path. Use a minimum 4 × 3 array of 10 mil thermal vias to connect the DAP to the system ground plane heat sink. The vias must be evenly distributed under the DAP. Use as much copper as possible for system ground plane, on the top and bottom layers for the best heat dissipation. Use a four-layer board with the copper thickness for the four layers, starting from the top as: 2 oz / 1 oz / 1 oz / 2 oz. A four-layer board with enough copper thickness and proper layout provides low current conduction impedance, proper shielding, and lower thermal resistance.