JAJSE52B November   2017  – May 2021 LM73605-Q1 , LM73606-Q1

PRODUCTION DATA  

  1. 1 特長
  2. 2 アプリケーション
  3. 3 概要
  4. 4 Revision History
  5. 5 Device Comparison
  6. 6 Pin Configuration and Functions
  7. 7 Specifications
    1. 7.1 Absolute Maximum Ratings
    2. 7.2 ESD Ratings
    3. 7.3 Recommended Operating Conditions
    4. 7.4 Thermal Information
    5. 7.5 Electrical Characteristics
    6. 7.6 Timing Characteristics
    7. 7.7 Switching Characteristics
    8. 7.8 System Characteristics
    9. 7.9 Typical Characteristics
  8. 8 Detailed Description
    1. 8.1 Overview
    2. 8.2 Functional Block Diagram
    3. 8.3 Feature Description
      1. 8.3.1  Synchronous Step-Down Regulator
      2. 8.3.2  Auto Mode and FPWM Mode
      3. 8.3.3  Fixed-Frequency Peak Current-Mode Control
      4. 8.3.4  Adjustable Output Voltage
      5. 8.3.5  Enable and UVLO
      6. 8.3.6  Internal LDO, VCC_UVLO, and BIAS Input
      7. 8.3.7  Soft Start and Voltage Tracking
      8. 8.3.8  Adjustable Switching Frequency
      9. 8.3.9  Frequency Synchronization and Mode Setting
      10. 8.3.10 Internal Compensation and CFF
      11. 8.3.11 Bootstrap Capacitor and VBOOT-UVLO
      12. 8.3.12 Power-Good and Overvoltage Protection
      13. 8.3.13 Overcurrent and Short-Circuit Protection
      14. 8.3.14 Thermal Shutdown
    4. 8.4 Device Functional Modes
      1. 8.4.1 Shutdown Mode
      2. 8.4.2 Standby Mode
      3. 8.4.3 Active Mode
        1. 8.4.3.1 CCM Mode
        2. 8.4.3.2 DCM Mode
        3. 8.4.3.3 PFM Mode
        4. 8.4.3.4 Fault Protection Mode
  9. 9 Layout
    1. 9.1 Layout Guidelines
      1. 9.1.1 Layout For EMI Reduction
      2. 9.1.2 Ground Plane
      3. 9.1.3 Optimize Thermal Performance
    2. 9.2 Layout Example
  10. 10Device and Documentation Support
    1. 10.1 Device Support
      1. 10.1.1 Third-Party Products Disclaimer
      2. 10.1.2 Development Support
        1. 10.1.2.1 Custom Design With WEBENCH® Tools
    2. 10.2 Documentation Support
      1. 10.2.1 Related Documentation
    3. 10.3 Receiving Notification of Documentation Updates
    4. 10.4 Receiving Notification of Documentation Updates
    5. 10.5 Support Resources
    6. 10.6 サポート・リソース
    7. 10.7 Trademarks
    8. 10.8 Electrostatic Discharge Caution
    9. 10.9 Glossary

パッケージ・オプション

メカニカル・データ（パッケージ｜ピン）
サーマルパッド・メカニカル・データ
発注情報

8.3.1 Synchronous Step-Down Regulator

The LM73605-Q1/6-Q1 synchronous buck with both power MOSFETs integrated in the device. Figure 8-1 shows a simplified schematic for synchronous and non-synchronous buck converters. The synchronous buck integrates both high-side (HS) and low-side (LS) power MOSFETs. The non-synchronous buck integrates HS MOSFET and works with a discrete power diode as LS rectifier.

GUID-FB0F081C-1EB2-4D21-AD77-A554CE61B8C3-low.gifFigure 8-1 Simplified Synchronous versus Non-synchronous Buck Converters

A synchronous converter with integrated HS and LS MOSFETs offers benefits such as the following:

  • Less design effort
  • Lower external component count
  • Reduced total solution size
  • Higher efficiency at heavier load
  • Easier PCB design
  • More control flexibility

The main advantage of a synchronous converter is that the voltage drop across the LS MOSFET is lower than the voltage drop across the power diode of a non-synchronous converter. Lower voltage drop translates into less power dissipation and higher efficiency. The LM73605-Q1/6-Q1 HS and LS MOSFETs with very low on-time resistance to improve efficiency. It is especially beneficial when the output voltage is low. Because the LS MOSFET is integrated into these devices, at light loads a synchronous converter has the flexibility to operate in either discontinuous or continuous conduction mode.

An integrated LS MOSFET also allows the controller to obtain inductor current information when the LS switch is on. It allows the control loop to make more complex decisions based on HS and LS currents. It allows the LM73605-Q1/6-Q1 to have peak and valley cycle-by-cycle current limiting for more robust protection.