JAJSLH6A February   2022  – May 2022 LM74502-Q1 , LM74502H-Q1

PRODUCTION DATA  

  1. 1 特長
  2. 2 アプリケーション
  3. 3 概要
  4. 4 Revision History
  5. 5 Device Comparison Table
  6. 6 Pin Configuration and Functions
  7. 7 Specifications
    1. 7.1 Absolute Maximum Ratings
    2. 7.2 ESD Ratings
    3. 7.3 Recommended Operating Conditions
    4. 7.4 Thermal Information
    5. 7.5 Electrical Characteristics
    6. 7.6 Switching Characteristics
    7. 7.7 Typical Characteristics
  8. 8 Parameter Measurement Information
  9. 9 Detailed Description
    1. 9.1 Overview
    2. 9.2 Functional Block Diagram
    3. 9.3 Feature Description
      1. 9.3.1 Input Voltage (VS)
      2. 9.3.2 Charge Pump (VCAP)
      3. 9.3.3 Gate Driver (GATE an SRC)
        1. 9.3.3.1 Inrush Current Control
      4. 9.3.4 Enable and Undervoltage Lockout (EN/UVLO)
      5. 9.3.5 Overvoltage Protection (OV)
    4. 9.4 Device Functional Modes
      1. 9.4.1 Shutdown Mode
      2. 9.4.2 Conduction Mode
  10. 10Application and Implementation
    1. 10.1 Application Information
    2. 10.2 Typical Application
      1. 10.2.1 Design Requirements
      2. 10.2.2 Detailed Design Procedure
        1. 10.2.2.1 Design Considerations
        2. 10.2.2.2 MOSFET Selection
        3. 10.2.2.3 Overvoltage Protection
        4. 10.2.2.4 Charge Pump VCAP, Input and Output Capacitance
      3. 10.2.3 Selection of TVS Diodes for 12-V Battery Protection Applications
      4. 10.2.4 Selection of TVS Diodes and MOSFET for 24-V Battery Protection Applications
      5. 10.2.5 Application Curves
    3. 10.3 Surge Stopper Using LM74502-Q1, LM74502H-Q1
      1. 10.3.1 VS Capacitance, Resistor R1 and Zener Clamp (DZ)
      2. 10.3.2 Overvoltage Protection
      3. 10.3.3 MOSFET Selection
    4. 10.4 Fast Turn-On and Turn-Off High Side Switch Driver Using LM74502H-Q1
  11. 11Power Supply Recommendations
  12. 12Layout
    1. 12.1 Layout Guidelines
    2. 12.2 Layout Example
  13. 13Device and Documentation Support
    1. 13.1 Receiving Notification of Documentation Updates
    2. 13.2 サポート・リソース
    3. 13.3 Trademarks
    4. 13.4 Electrostatic Discharge Caution
    5. 13.5 Glossary
  14. 14Mechanical, Packaging, and Orderable Information

パッケージ・オプション

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発注情報

9.3.3.1 Inrush Current Control

An external circuit as shown in Figure 9-2 can be added on the GATE pin of the LM74502-Q1 to have additional inrush current control for the applications which have large capacitive loads.

Figure 9-2 Inrush Current Limiting Using LM74502-Q1

The CdVdT capacitor is required for slowing down the GATE voltage ramp during power up for inrush current limiting. Use Equation 3 to calculate CdVdT capacitance value.

Equation 2.

where IGATE is 60 μA (typical), IINRUSH is the inrush current and COUT is the output load capacitance. An extra resistor, RG, in series with the CdVdT capacitor acts as an isolation resistor between Cdvdt and gate of the MOSFET.

The inrush current control scheme shown in Figure 9-2 is not applicable to LM74502H-Q1 as its gate drive is optimized for fast turn-on load switch applications.