JAJSLH6A February   2022  – May 2022 LM74502-Q1 , LM74502H-Q1

PRODUCTION DATA  

  1. 1 特長
  2. 2 アプリケーション
  3. 3 概要
  4. 4 Revision History
  5. 5 Device Comparison Table
  6. 6 Pin Configuration and Functions
  7. 7 Specifications
    1. 7.1 Absolute Maximum Ratings
    2. 7.2 ESD Ratings
    3. 7.3 Recommended Operating Conditions
    4. 7.4 Thermal Information
    5. 7.5 Electrical Characteristics
    6. 7.6 Switching Characteristics
    7. 7.7 Typical Characteristics
  8. 8 Parameter Measurement Information
  9. 9 Detailed Description
    1. 9.1 Overview
    2. 9.2 Functional Block Diagram
    3. 9.3 Feature Description
      1. 9.3.1 Input Voltage (VS)
      2. 9.3.2 Charge Pump (VCAP)
      3. 9.3.3 Gate Driver (GATE an SRC)
        1. 9.3.3.1 Inrush Current Control
      4. 9.3.4 Enable and Undervoltage Lockout (EN/UVLO)
      5. 9.3.5 Overvoltage Protection (OV)
    4. 9.4 Device Functional Modes
      1. 9.4.1 Shutdown Mode
      2. 9.4.2 Conduction Mode
  10. 10Application and Implementation
    1. 10.1 Application Information
    2. 10.2 Typical Application
      1. 10.2.1 Design Requirements
      2. 10.2.2 Detailed Design Procedure
        1. 10.2.2.1 Design Considerations
        2. 10.2.2.2 MOSFET Selection
        3. 10.2.2.3 Overvoltage Protection
        4. 10.2.2.4 Charge Pump VCAP, Input and Output Capacitance
      3. 10.2.3 Selection of TVS Diodes for 12-V Battery Protection Applications
      4. 10.2.4 Selection of TVS Diodes and MOSFET for 24-V Battery Protection Applications
      5. 10.2.5 Application Curves
    3. 10.3 Surge Stopper Using LM74502-Q1, LM74502H-Q1
      1. 10.3.1 VS Capacitance, Resistor R1 and Zener Clamp (DZ)
      2. 10.3.2 Overvoltage Protection
      3. 10.3.3 MOSFET Selection
    4. 10.4 Fast Turn-On and Turn-Off High Side Switch Driver Using LM74502H-Q1
  11. 11Power Supply Recommendations
  12. 12Layout
    1. 12.1 Layout Guidelines
    2. 12.2 Layout Example
  13. 13Device and Documentation Support
    1. 13.1 Receiving Notification of Documentation Updates
    2. 13.2 サポート・リソース
    3. 13.3 Trademarks
    4. 13.4 Electrostatic Discharge Caution
    5. 13.5 Glossary
  14. 14Mechanical, Packaging, and Orderable Information

パッケージ・オプション

デバイスごとのパッケージ図は、PDF版データシートをご参照ください。

メカニカル・データ（パッケージ｜ピン）
  • DDF|8
サーマルパッド・メカニカル・データ
発注情報

6 Pin Configuration and Functions

Figure 6-1 DDF Package8-Pin SOT-23LM74502-Q1, LM74502H-Q1 Top View
Table 6-1 LM74502-Q1, LM74502H-Q1 Pin Functions
PINI/O(1)DESCRIPTION
NO.NAME
1EN/UVLOIEN/UVLO input. Connect to VS pin for always ON operation. Can be driven externally from a micro controller I/O. Pulling this pin low below V(ENF) makes the device enter into low Iq shutdown mode. For UVLO, connect an external resistor ladder from input supply to EN/UVLO to GND.
2GNDGGround pin
3N.C

—

No connection
4VCAPOCharge pump output. Connect to external charge pump capacitor.
5VSIInput power supply pin to the controller. Connect a 100-nF capacitor across VS and GND pins.
6GATEOGate drive output. Connect to gate of the external N-channel MOSFET.
7OV

I

Adjustable overvoltage threshold input. Connect a resistor ladder across input and output. When the voltage at OV pin exceeds the overvoltage cutoff threshold, then the GATE is pulled low. GATE turns ON when the OV pin voltage goes below the OV protection falling threshold.

Connect OV pin to GND if OV feature is not used.

8SRC

I

Source pin. Connect to common source point of external back-to-back connected N-channel MOSFETs or the source pin of the high side switch MOSFET.

(1) I = Input, O = Output, G = GND