SNOSDG3 December   2024 LM74681

PRODUCTION DATA  

  1.   1
  2. 1 Features
  3. 2 Applications
  4. 3 Description
  5. 4 Pin Configuration and Functions
  6. 5 Specifications
    1. 5.1 Absolute Maximum Ratings
    2. 5.2 ESD Ratings
    3. 5.3 Recommended Operating Conditions
    4. 5.4 Thermal Information
    5. 5.5 Electrical Characteristics
    6. 5.6 Switching Characteristics
    7. 5.7 Typical Characteristics
  7. 6 Parameter Measurement Information
  8. 7 Detailed Description
    1. 7.1 Overview
    2. 7.2 Functional Block Diagram
    3. 7.3 Feature Description
      1. 7.3.1 Input and Output Voltage
      2. 7.3.2 Charge Pump
      3. 7.3.3 Gate Driver
      4. 7.3.4 Enable
    4. 7.4 Device Functional Modes
      1. 7.4.1 Conduction Mode
        1. 7.4.1.1 Regulated Conduction Mode
        2. 7.4.1.2 Full Conduction Mode
      2. 7.4.2 Reverse Current Protection Mode
  9. 8 Application and Implementation
    1. 8.1 Application Information
    2. 8.2 Typical Application
      1. 8.2.1 Design Requirements
      2. 8.2.2 Detailed Design Procedure
        1. 8.2.2.1 Design Considerations
        2. 8.2.2.2 MOSFET Selection
        3. 8.2.2.3 Output capacitance
      3. 8.2.3 Application Curves
    3. 8.3 Powered Device for IEEE 802.3bt Class 5-8 (45W-90W) Systems
    4. 8.4 Power Supply Recommendations
      1. 8.4.1 Transient Protection
    5. 8.5 Layout
      1. 8.5.1 Layout Guidelines
      2. 8.5.2 Layout Example
  10. 9 Device and Documentation Support
    1. 9.1 Receiving Notification of Documentation Updates
    2. 9.2 Support Resources
    3. 9.3 Trademarks
    4. 9.4 Electrostatic Discharge Caution
    5. 9.5 Glossary
  11. 10Revision History
  12. 11Mechanical, Packaging, and Orderable Information

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発注情報

7.4.1.1 Regulated Conduction Mode

For the LM74681 to operate its top gates TG1 and TG2 in regulated conduction mode, the gate driver must be enabled as described in Section 7.3.3 and the current from source to drain of the external MOSFET must be within the range to result in an INx to OUTP voltage drop of VREV to VTG_FC . During forward regulation mode, the INx to OUTP voltage is regulated to VTG_REG by adjusting the gate to source voltage. This closed loop regulation scheme enables graceful turn-off of the MOSFET at very light loads and ensures zero DC reverse current flow.