JAJSKN8 September   2021 LM74700-EP

PRODUCTION DATA  

  1. 特長
  2. アプリケーション
  3. 概要
  4. Revision History
  5. Pin Configuration and Functions
  6. Specifications
    1. 6.1 Absolute Maximum Ratings
    2. 6.2 ESD Ratings
    3. 6.3 Recommended Operating Conditions
    4. 6.4 Thermal Information
    5. 6.5 Electrical Characteristics
    6. 6.6 Switching Characteristics
    7. 6.7 Typical Characteristics
  7. Parameter Measurement Information
  8. Detailed Description
    1. 8.1 Overview
    2. 8.2 Functional Block Diagram
    3. 8.3 Feature Description
      1. 8.3.1 Input Voltage
      2. 8.3.2 Charge Pump
      3. 8.3.3 Gate Driver
      4. 8.3.4 Enable
    4. 8.4 Device Functional Modes
      1. 8.4.1 Shutdown Mode
      2. 8.4.2 Conduction Mode
        1. 8.4.2.1 Regulated Conduction Mode
        2. 8.4.2.2 Full Conduction Mode
        3. 8.4.2.3 Reverse Current Protection Mode
  9. Application and Implementation
    1. 9.1 Application Information
    2. 9.2 Typical Application
      1. 9.2.1 Design Requirements
      2. 9.2.2 Detailed Design Procedure
        1. 9.2.2.1 Design Considerations
        2. 9.2.2.2 MOSFET Selection
        3. 9.2.2.3 Charge Pump VCAP, input and output capacitance
      3. 9.2.3 Selection of TVS Diodes for 12-V Battery Protection Applications
      4. 9.2.4 Selection of TVS Diodes and MOSFET for 24-V Battery Protection Applications
      5. 9.2.5 Application Curves
    3. 9.3 OR-ing Application Configuration
  10. 10Power Supply Recommendations
  11. 11Layout
    1. 11.1 Layout Guidelines
    2. 11.2 Layout Example
  12. 12Device and Documentation Support
    1. 12.1 Receiving Notification of Documentation Updates
    2. 12.2 サポート・リソース
    3. 12.3 Trademarks
    4. 12.4 Electrostatic Discharge Caution
    5. 12.5 Glossary
  13. 13Mechanical, Packaging, and Orderable Information

パッケージ・オプション

メカニカル・データ(パッケージ|ピン)
サーマルパッド・メカニカル・データ
発注情報

Application Curves

GUID-B1E0ADED-67B5-4E4F-AB12-5DD5C561FD90-low.pngFigure 9-4 ISO 7637-2 Pulse 1
GUID-20210803-CA0I-QFKC-QB6M-BRWBDHLLCRRB-low.png
Time (4 ms/DIV)
Figure 9-6 Startup With 3-A Load
GUID-20210803-CA0I-4NLT-15ZP-ZHKVLT7DJXM2-low.png
Time (20 ms/DIV)
Figure 9-8 VCAP During Startup at 3-A Load
GUID-20210803-CA0I-RKLJ-73WW-LBW2WT40HPJ1-low.png
Time (4 ms/DIV)
Figure 9-10 Enable Threshold
GUID-20210803-CA0I-ZPSZ-QB5D-CKKJWKBPM3CQ-low.png
Time (4 ms/DIV)
Figure 9-12 ORing VIN1 to VIN2 Switch Over
GUID-20210803-CA0I-JD5Q-TQBQ-G1LBTT3S1N3C-low.png
Time (4 ms/DIV)
Figure 9-14 ORing VIN2 to VIN1 Switch Over
GUID-20210803-CA0I-2RVW-0FWJ-64RNQTV9G8KD-low.png
Time (4 ms/DIV)
Figure 9-16 ORing – VIN2 Failure and Switch Over to VIN1
GUID-B435ED33-1E69-46ED-AC26-38D7377798B3-low.gif
Time (5 ms/DIV)
Figure 9-5 Response to ISO 7637-2 Pulse 1
GUID-20210803-CA0I-59WD-QSQ6-GSNFBB4TQ8DV-low.png
Time (4 ms/DIV)
Figure 9-7 Startup With 6-A Load
GUID-20210803-CA0I-N2GF-RPGX-LMGFNSFKJMT6-low.png
Time (40 ms/DIV)
Figure 9-9 VCAP During Startup at 6-A Load
GUID-20210803-CA0I-HZ6J-62CK-VD29F7L2DMCD-low.png
Time (100 µs/DIV)
Figure 9-11 Enable Turn ON Delay
GUID-20210803-CA0I-WR0G-0SPD-LLCVNG01PX9Z-low.png
Time (4 ms/DIV)
Figure 9-13 ORing VIN1 to VIN2 Switch Over
GUID-20210803-CA0I-HDTW-FSDG-VPGWCDGNK0RL-low.png
Time (4 ms/DIV)
Figure 9-15 ORing VIN2 to VIN1 Switch Over
GUID-20210803-CA0I-1TFB-3FMT-8Z2HF3HGDSWH-low.png
Time (10 ms/DIV)
Figure 9-17 ORing - VIN2 Failure and Switch Over to VIN1