JAJSRB9 September   2023 LM74700D-Q1

PRODUCTION DATA  

  1.   1
  2. 1 特長
  3. 2 アプリケーション
  4. 3 概要
  5. 4 Revision History
  6. 5 Pin Configuration and Functions
  7. 6 Specifications
    1. 6.1 Absolute Maximum Ratings
    2. 6.2 ESD Ratings
    3. 6.3 Recommended Operating Conditions
    4. 6.4 Thermal Information
    5. 6.5 Electrical Characteristics
    6. 6.6 Switching Characteristics
  8. 7 Typical Characteristics
  9. 8 Parameter Measurement Information
  10. 9 Detailed Description
    1. 9.1 Overview
    2. 9.2 機能ブロック図
    3. 9.3 Feature Description
      1. 9.3.1 Input Voltage
      2. 9.3.2 Charge Pump
      3. 9.3.3 Gate Driver
      4. 9.3.4 Enable
    4. 9.4 Device Functional Modes
      1. 9.4.1 Shutdown Mode
      2. 9.4.2 Conduction Mode
        1. 9.4.2.1 Regulated Conduction Mode
        2. 9.4.2.2 Full Conduction Mode
        3. 9.4.2.3 Reverse Current Protection Mode
  11. 10Application and Implementation
    1. 10.1 Application Information
    2. 10.2 Typical Application
      1. 10.2.1 Design Requirements
      2. 10.2.2 Detailed Design Procedure
        1. 10.2.2.1 Design Considerations
        2. 10.2.2.2 MOSFET Selection
        3. 10.2.2.3 Charge Pump VCAP, Input and Output Capacitance
      3. 10.2.3 Selection of TVS Diodes for 12-V Battery Protection Applications
      4. 10.2.4 Selection of TVS Diodes and MOSFET for 24-V Battery Protection Applications
      5. 10.2.5 Application Curves
      6. 10.2.6 OR-ing Application Configuration
    3. 10.3 Power Supply Recommendations
    4. 10.4 Layout
      1. 10.4.1 Layout Guidelines
      2. 10.4.2 Layout Example
  12. 11Device and Documentation Support
    1. 11.1 ドキュメントの更新通知を受け取る方法
    2. 11.2 サポート・リソース
    3. 11.3 Trademarks
    4. 11.4 静電気放電に関する注意事項
    5. 11.5 用語集
  13. 12Mechanical, Packaging, and Orderable Information

パッケージ・オプション

メカニカル・データ（パッケージ｜ピン）
サーマルパッド・メカニカル・データ

9.4.2.2 Full Conduction Mode

For the LM74700D-Q1 to operate in full conduction mode, the gate driver must be enabled as described in the Gate Driver section, and the current from source to drain of the external MOSFET must be large enough to result in an ANODE to CATHODE voltage drop of greater than 50-mV typical. If these conditions are achieved the GATE pin is internally connected to the VCAP pin resulting in the GATE to ANODE voltage being approximately the same as the VCAP to ANODE voltage. By connecting VCAP to GATE the external MOSFET's RDS(ON) is minimized reducing the power loss of the external MOSFET when forward currents are large.