JAJSMX2B September   2021  – July 2022 LM74721-Q1

PRODUCTION DATA  

  1. 1 特長
  2. 2 アプリケーション
  3. 3 概要
  4. 4 Revision History
  5. 5 Pin Configuration and Functions
  6. 6 Specifications
    1. 6.1 Absolute Maximum Ratings
    2. 6.2 ESD Ratings
    3. 6.3 Recommended Operating Conditions
    4. 6.4 Thermal Information
    5. 6.5 Electrical Characteristics
    6. 6.6 Switching Characteristics
    7. 6.7 Typical Characteristics
  7. 7 Parameter Measurement Information
  8. 8 Detailed Description
    1. 8.1 Overview
    2. 8.2 Functional Block Diagram
    3. 8.3 Feature Description
      1. 8.3.1 Reverse Battery Protection (A, C, GATE)
        1. 8.3.1.1 Input TVS Less Operation: VDS Clamp
      2. 8.3.2 Load Disconnect Switch Control (PD)
      3. 8.3.3 Overvoltage Protection and Battery Voltage Sensing (VSNS, SW, OV)
      4. 8.3.4 Boost Regulator
    4. 8.4 Shutdown Mode
  9. 9 Application and Implementation
    1. 9.1 Application Information
    2. 9.2 Typical 12-V Reverse Battery Protection Application
      1. 9.2.1 Design Requirements for 12-V Battery Protection
      2. 9.2.2 Detailed Design Procedure
        1. 9.2.2.1 Boost Converter Components (C2, C3, L1)
        2. 9.2.2.2 Input and Output Capacitance
        3. 9.2.2.3 Hold-Up Capacitance
        4. 9.2.2.4 MOSFET Selection: Q1
      3. 9.2.3 Application Curves
    3. 9.3 What to Do and What Not to Do
  10. 10Power Supply Recommendations
    1. 10.1 Transient Protection
  11. 11Layout
    1. 11.1 Layout Guidelines
    2. 11.2 Layout Example
  12. 12Device and Documentation Support
    1. 12.1 Receiving Notification of Documentation Updates
    2. 12.2 サポート・リソース
    3. 12.3 Trademarks
    4. 12.4 Electrostatic Discharge Caution
    5. 12.5 Glossary
  13. 13Mechanical, Packaging, and Orderable Information

パッケージ・オプション

デバイスごとのパッケージ図は、PDF版データシートをご参照ください。

メカニカル・データ（パッケージ｜ピン）
  • DRR|12
サーマルパッド・メカニカル・データ
発注情報

9.1 Application Information

LM74721-Q1 controls two N-channel power MOSFETs with GATE used to control diode MOSFET to emulate an ideal diode and PD controlling second MOSFET for power path cutoff when disabled or during an overvoltage protection and provide inrush current limiting. IQ during operation (EN = High) is < 35 µA and < 3.3 µA during shutdown mode (EN = Low). LM74721-Q1 can be placed into low quiescent current mode using EN = low, where both GATE and PD are turned OFF.