JAJSJ94B September   2021  – August 2022 LM74722-Q1

PRODUCTION DATA  

  1. 特長
  2. アプリケーション
  3. 概要
  4. Revision History
  5. Pin Configuration and Functions
  6. Specifications
    1. 6.1 Absolute Maximum Ratings
    2. 6.2 ESD Ratings
    3. 6.3 Recommended Operating Conditions
    4. 6.4 Thermal Information
    5. 6.5 Electrical Characteristics
    6. 6.6 Switching Characteristics
    7. 6.7 Typical Characteristics
  7. Parameter Measurement Information
  8. Detailed Description
    1. 8.1 Overview
    2. 8.2 Functional Block Diagram
    3. 8.3 Feature Description
      1. 8.3.1 Dual Gate Control (GATE, PD)
        1. 8.3.1.1 Reverse Battery Protection (A, C, GATE)
        2. 8.3.1.2 Load Disconnect Switch Control (PD)
        3. 8.3.1.3 Overvoltage Protection and Battery Voltage Sensing (VSNS, SW, OV)
      2. 8.3.2 Boost Regulator
    4. 8.4 Device Functional Modes
  9. Application and Implementation
    1. 9.1 Application Information
    2. 9.2 Typical 12-V Reverse Battery Protection Application
      1. 9.2.1 Design Requirements for 12-V Battery Protection
        1. 9.2.1.1 Automotive Reverse Battery Protection
          1. 9.2.1.1.1 Input Transient Protection: ISO 7637-2 Pulse 1
          2. 9.2.1.1.2 AC Super Imposed Input Rectification: ISO 16750-2 and LV124 E-06
          3. 9.2.1.1.3 Input Micro-Short Protection: LV124 E-10
      2. 9.2.2 Detailed Design Procedure
        1. 9.2.2.1 Design Considerations
        2. 9.2.2.2 Boost Converter Components (C2, C3, L1)
        3. 9.2.2.3 Input and Output Capacitance
        4. 9.2.2.4 Hold-Up Capacitance
        5. 9.2.2.5 Overvoltage Protection and Battery Monitor
        6. 9.2.2.6 MOSFET Selection: Blocking MOSFET Q1
        7. 9.2.2.7 MOSFET Selection: Load Disconnect MOSFET Q2
        8. 9.2.2.8 TVS Selection
      3. 9.2.3 Application Curves
    3. 9.3 What to Do and What Not to Do
  10. 10Power Supply Recommendations
    1. 10.1 Transient Protection
    2. 10.2 TVS Selection for 12-V Battery Systems
    3. 10.3 TVS Selection for 24-V Battery Systems
  11. 11Layout
    1. 11.1 Layout Guidelines
    2. 11.2 Layout Example
  12. 12Device and Documentation Support
    1. 12.1 Receiving Notification of Documentation Updates
    2. 12.2 サポート・リソース
    3. 12.3 Trademarks
    4. 12.4 Electrostatic Discharge Caution
    5. 12.5 Glossary
  13. 13Mechanical, Packaging, and Orderable Information

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発注情報

TVS Selection for 24-V Battery Systems

For 24-V battery protection application, the TVS and MOSFET in Figure 9-1 must be changed to suit 24-V battery requirements.

The breakdown voltage of the TVS+ must be higher than 48-V jump start voltage, less than the absolute maximum ratings of anode and enable pin of LM74722-Q1 (70 V), and must withstand 65-V suppressed load dump. The breakdown voltage of TVS– must be lower than maximum reverse battery voltage –32 V, so that the TVS– does not damage due to long time exposure to reverse connected battery.

During ISO 7637-2 pulse 1, the input voltage goes up to –600 V with a generator impedance of 50 Ω. This translates to 12 A flowing through the TVS–. The clamping voltage of the TVS– cannot be the same as that of 12-V battery protection circuit. Because during the ISO 7637-2 pulse, the anode to cathode voltage seen is equal to (-– TVS Clamping voltage + Output capacitor voltage). For 24-V battery application, the maximum battery voltage is 32 V, then the clamping voltage of the TVS– must not exceed, 85 V – 32 V = 53 V.

Single bi-directional TVS cannot be used for 24-V battery protection because breakdown voltage for TVS+ ≥ 65 V, maximum clamping voltage is ≤ 53 V and the clamping voltage cannot be less than the breakdown voltage. Two un-directional TVS connected back-to-back must be used at the input. For positive side TVS+, TI recommends SMBJ58A with the breakdown voltage of 64.4 V (minimum), 67.8 (typical). For the negative side TVS–, TI recommends SMBJ28A with breakdown voltage close to 32 V (to withstand maximum reverse battery voltage –32 V) and maximum clamping voltage of 42.1 V.

For 24-V battery protection, TI recommends that a 75-V rated MOSFET be used along with SMBJ28A and SMBJ58A connected back-to-back at the input.