JAJSJ94B September   2021  – August 2022 LM74722-Q1

PRODUCTION DATA  

  1. 特長
  2. アプリケーション
  3. 概要
  4. Revision History
  5. Pin Configuration and Functions
  6. Specifications
    1. 6.1 Absolute Maximum Ratings
    2. 6.2 ESD Ratings
    3. 6.3 Recommended Operating Conditions
    4. 6.4 Thermal Information
    5. 6.5 Electrical Characteristics
    6. 6.6 Switching Characteristics
    7. 6.7 Typical Characteristics
  7. Parameter Measurement Information
  8. Detailed Description
    1. 8.1 Overview
    2. 8.2 Functional Block Diagram
    3. 8.3 Feature Description
      1. 8.3.1 Dual Gate Control (GATE, PD)
        1. 8.3.1.1 Reverse Battery Protection (A, C, GATE)
        2. 8.3.1.2 Load Disconnect Switch Control (PD)
        3. 8.3.1.3 Overvoltage Protection and Battery Voltage Sensing (VSNS, SW, OV)
      2. 8.3.2 Boost Regulator
    4. 8.4 Device Functional Modes
  9. Application and Implementation
    1. 9.1 Application Information
    2. 9.2 Typical 12-V Reverse Battery Protection Application
      1. 9.2.1 Design Requirements for 12-V Battery Protection
        1. 9.2.1.1 Automotive Reverse Battery Protection
          1. 9.2.1.1.1 Input Transient Protection: ISO 7637-2 Pulse 1
          2. 9.2.1.1.2 AC Super Imposed Input Rectification: ISO 16750-2 and LV124 E-06
          3. 9.2.1.1.3 Input Micro-Short Protection: LV124 E-10
      2. 9.2.2 Detailed Design Procedure
        1. 9.2.2.1 Design Considerations
        2. 9.2.2.2 Boost Converter Components (C2, C3, L1)
        3. 9.2.2.3 Input and Output Capacitance
        4. 9.2.2.4 Hold-Up Capacitance
        5. 9.2.2.5 Overvoltage Protection and Battery Monitor
        6. 9.2.2.6 MOSFET Selection: Blocking MOSFET Q1
        7. 9.2.2.7 MOSFET Selection: Load Disconnect MOSFET Q2
        8. 9.2.2.8 TVS Selection
      3. 9.2.3 Application Curves
    3. 9.3 What to Do and What Not to Do
  10. 10Power Supply Recommendations
    1. 10.1 Transient Protection
    2. 10.2 TVS Selection for 12-V Battery Systems
    3. 10.3 TVS Selection for 24-V Battery Systems
  11. 11Layout
    1. 11.1 Layout Guidelines
    2. 11.2 Layout Example
  12. 12Device and Documentation Support
    1. 12.1 Receiving Notification of Documentation Updates
    2. 12.2 サポート・リソース
    3. 12.3 Trademarks
    4. 12.4 Electrostatic Discharge Caution
    5. 12.5 Glossary
  13. 13Mechanical, Packaging, and Orderable Information

パッケージ・オプション

メカニカル・データ(パッケージ|ピン)
サーマルパッド・メカニカル・データ
発注情報

Electrical Characteristics

TJ = –40°C to +125°C; typical values at TJ = 25°C, V(A) = V(C) = 12 V, C(CAP) = 1 µF, V(EN) = 2 V, over operating free-air temperature range (unless otherwise noted)
PARAMETER TEST CONDITIONS MIN TYP MAX UNIT
VSUPPLY VOLTAGE
V(A POR) VA POR Rising threshold 3.1 3.4 3.85 V
VA POR Falling threshold 2.2 2.6 2.9
V(C) Minimum voltage at C 3
I(SHDN) Shutdown Supply Current V(EN) = 0 V 1.5 3.3 µA
I(Q) Total System Quiescent Current V(EN) = 2 V, Active Rectifier Controller In Regulation, –40°C ≤ TJ ≤ +85°C 27 32
V(EN) = 2 V, Active Rectifier Controller In Regulation, –40°C ≤ TJ ≤ +125°C 27 35
ENABLE INPUT
V(EN_IH) Enable input high threshold 2 V
V(EN_IL) Enable input low threshold 0.5 0.85 1.2
V(EN_Hys) Enable Hysteresis 485 mV
I(EN) Enable sink current V(EN) = 12 V 55 155 nA
VANODE to VCATHODE
V(AC REG) Regulated Forward V(AC) Threshold 7.5 12.8 18.7 mV
V(AC_FWD) V(AC) threshold from RCB to oFCB 75 105 140
V(AC_REV) V(AC) threshold for reverse current blocking –12 –5.6 –1.3
GATE DRIVE
V(GATE) - V(A) 3 V < V(C) < 65 V 9.5 13 V
I(GATE) Regulation max sink current V(A) – V(C) = 0 V, 
V(GATE) – V(A) = 5 V
8.5 22 39 µA
Peak Pull down current V(A) – V(C) = –20 mV 2.5 A
RGATE GATE pull down resistance V(A) – V(C) = –20 mV, 
V(GATE) – V(A) = 100 mV
1.2
BOOST REGULATOR CHARGE PUMP
V(CAP) –  V(C) Boost output rising threshold 13 15.5 V
Hysteresis 1.1
I(CAP) Boost load capacity V(CAP) – V(C)  = 7.5 V 29 mA
I(LX) Peak Inductor current limit V(C) = 12 V 110 140 175
V(C) = 3 V 210
R(LX) Low side switch on-resistance 1.3 2.7 5.1
BATTERY SENSING (VSNS, SW) AND OVER VOLTAGE DETECTION (OVP, PD)
R(SW) Battery sensing disconnect switch resistance 104 226 430
V(OVR) Overvoltage threshold input, risIng 1.13 1.231 1.33 V
V(OVF) Overvoltage threshold input, falling 1.03 1.125 1.215 V
V(OV_Hys) OV Hysteresis 110 mV
I(OV) OV Input leakage current 0 V < V(OV) < 5 V 50 110 nA
I(PD_SRC) Pull up current 3 V < V(C) < 65 V 43 50 60 µA
I(PD_SINK,Pk) Peak Pull down current V(OV) > V(OVR) 55 88 117 mA
I(PD_SINK,DC) DC Pull down current 7 10 14 mA
CATHODE
V(C) C POR Rising  2.58 2.8 2.95 V
C POR Falling  2.35 2.6 2.85
I(C) C sink current V(A) = 12 V, V(A) – V(C) = –100 mV 8.5 15 µA
V(A) = –14 V, V(C) = 14 V 12.8 18