JAJSM84B december   2022  – july 2023 LM74900-Q1 , LM74910-Q1

PRODUCTION DATA  

  1.   1
  2. 1 特長
  3. 2 アプリケーション
  4. 3 概要
  5. 4 Revision History
  6. 5 Device Comparison Table
  7. 6 Pin Configuration and Functions
  8. 7 Specifications
    1. 7.1 Absolute Maximum Ratings
    2. 7.2 ESD Ratings
    3. 7.3 Recommended Operating Conditions
    4. 7.4 Thermal Information
    5. 7.5 Electrical Characteristics
    6. 7.6 スイッチング特性
    7. 7.7 Typical Characteristics
  9. 8 Parameter Measurement Information
  10. 9 Detailed Description
    1. 9.1 Overview
    2. 9.2 Functional Block Diagram
    3. 9.3 Feature Description
      1. 9.3.1 Charge Pump
      2. 9.3.2 Dual Gate Control (DGATE, HGATE)
        1. 9.3.2.1 Reverse Battery Protection (A, C, DGATE)
        2. 9.3.2.2 Load Disconnect Switch Control (HGATE, OUT)
      3. 9.3.3 Overcurrent Protection (CS+, CS-, ILIM, IMON, TMR)
        1. 9.3.3.1 Pulse Overload Protection, Circuit Breaker
        2. 9.3.3.2 Overcurrent Protection With Latch-Off
        3. 9.3.3.3 Short Circuit Protection (ISCP)
        4. 9.3.3.4 Analog Current Monitor Output (IMON)
      4. 9.3.4 Undervoltage Protection, Overvoltage Protection, and Battery Voltage Sensing (UVLO, OV, SW)
      5. 9.3.5 Low IQ SLEEP Mode (SLEEP)
      6. 9.3.6 Ultra Low IQ Shutdown (EN)
  11. 10Applications and Implementation
    1. 10.1 Application Information
    2. 10.2 Typical 12-V Reverse Battery Protection Application
      1. 10.2.1 Design Requirements for 12-V Battery Protection
      2. 10.2.2 Automotive Reverse Battery Protection
        1. 10.2.2.1 Input Transient Protection: ISO 7637-2 Pulse 1
        2. 10.2.2.2 AC Super Imposed Input Rectification: ISO 16750-2 and LV124 E-06
        3. 10.2.2.3 Input Micro-Short Protection: LV124 E-10
      3. 10.2.3 Detailed Design Procedure
        1. 10.2.3.1 Design Considerations
        2. 10.2.3.2 Charge Pump Capacitance VCAP
        3. 10.2.3.3 Input and Output Capacitance
        4. 10.2.3.4 Hold-Up Capacitance
        5. 10.2.3.5 Selection of Current Sense Resistor, RSNS
        6. 10.2.3.6 Selection of Scaling Resistor (RSET) and Short-Circuit Protection Setting Resistor (RSCP)
        7. 10.2.3.7 Overcurrent Limit (ILIM), Circuit Breaker Timer (TMR), and Current Monitoring Output (IMON) Selection
        8. 10.2.3.8 Overvoltage Protection and Battery Monitor
      4. 10.2.4 MOSFET Selection: Blocking MOSFET Q1
      5. 10.2.5 MOSFET Selection: Hot-Swap MOSFET Q2
      6. 10.2.6 TVS Selection
      7. 10.2.7 Application Curves
    3. 10.3 Addressing Automotive Input Reverse Battery Protection Topologies With LM749x0-Q1
    4. 10.4 Power Supply Recommendations
      1. 10.4.1 Transient Protection
      2. 10.4.2 TVS Selection for 12-V Battery Systems
    5. 10.5 Layout
      1. 10.5.1 Layout Guidelines
  12. 11Device and Documentation Support
    1. 11.1 ドキュメントの更新通知を受け取る方法
    2. 11.2 サポート・リソース
    3. 11.3 Trademarks
    4. 11.4 静電気放電に関する注意事項
    5. 11.5 用語集
  13. 12Mechanical, Packaging, and Orderable Information

パッケージ・オプション

メカニカル・データ（パッケージ｜ピン）
サーマルパッド・メカニカル・データ
発注情報

9.3.3.1 Pulse Overload Protection, Circuit Breaker

LM749x0-Q1 provides programmable overcurrent threshold setting by means of resistor (RLIM) connected from ILIM pin to GND.

Equation 3. GUID-20221120-SS0I-4SH5-HCDR-FJW4SMJ9L5XZ-low.svg

where

  • RSET is the resistor connected across CS+ and VS
  • RSNS is the current sense resistor
  • ILIM is the overcurrent level

The CTMR programs the circuit breaker and auto-retry time. Once the voltage across CS+ and CS– exceeds the set point, the CTMR starts charging with 85-µA pull up current. Once the CTMR charges to VTMR_FLT, FLT asserts low providing warning on impending FET turn OFF. Once CTMR charges to VTMR_OC, HGATE is pulled to OUT turning OFF the HFET. After this event, the auto-retry behavior starts. The CTMR capacitor starts discharging with 2.7-µA pull down current. Once the voltage reaches VTMR_Low level, the capacitor starts charging with 2.7-µA pull up. After 32 charging/discharging cycles of CTMR, the FET turns ON and FLT de-asserts after de-assertion delay.

Equation 4. GUID-20230608-SS0I-DTT1-8RG8-SNJQXSTQ0QLK-low.svg

where

  • TOC is the delay to turn OFF the FET
  • CTMR is the capacitance across TMR to GND

The auto-retry time can be computed as

Equation 5. GUID-20221120-SS0I-Q62P-24KV-0WVCDSBPQB4H-low.svg

If the overcurrent pulse duration is below TOC then the FET remains ON and CTMR gets discharged using internal pull down switch.

When not used, ILIM is connected to ground while TMR can be left floating.

GUID-20230608-SS0I-RDDW-LDRN-GBLR2G8JR3LB-low.svgFigure 9-3 LM749x0 Auto Retry TIMER Functionality
GUID-20210816-SS0I-MGTH-T5NT-BDTRW04QLPMX-low.svgFigure 9-4 Overcurrent Protection With Auto Retry Timing Diagram

If the overcurrent pulse duration is below TOC then the HFET remains ON and CTMR gets discharged using internal pull down switch.