JAJSGZ0A March   2019  – September 2019 LM76202-Q1

PRODUCTION DATA.  

  1. 特長
  2. アプリケーション
  3. 概要
    1.     Device Images
      1.      概略回路図
      2.      24V での ISO16750-2 ロードダンプ・パルス 5b 性能
  4. 改訂履歴
  5. Pin Configuration and Functions
    1.     Pin Functions
  6. Specifications
    1. 6.1      Absolute Maximum Ratings
    2. 6.2      ESD Ratings
    3. 6.3      Recommended Operating Conditions
    4. Table 1. Thermal Information
    5. 6.4      Electrical Characteristics
    6. 6.5      Timing Requirements
    7. 6.6      Typical Characteristics
  7. Parameter Measurement Information
  8. Detailed Description
    1. 8.1 Overview
    2. 8.2 Functional Block Diagram
    3. 8.3 Feature Description
      1. 8.3.1 Undervoltage Lockout (UVLO)
      2. 8.3.2 Overvoltage Protection (OVP)
      3. 8.3.3 Reverse Battery Protection
      4. 8.3.4 Hot Plug-In and In-Rush Current Control
      5. 8.3.5 Overload and Short Circuit Protection
        1. 8.3.5.1 Overload Protection
          1. 8.3.5.1.1 Active Current Limiting
          2. 8.3.5.1.2 Electronic Circuit Breaker with Overload Timeout, MODE = OPEN
        2. 8.3.5.2 Short Circuit Protection
          1. 8.3.5.2.1 Start-Up With Short-Circuit On Output
        3. 8.3.5.3 FAULT Response
          1. 8.3.5.3.1 Look Ahead Overload Current Fault Indicator
        4. 8.3.5.4 Current Monitoring
        5. 8.3.5.5 IN, OUT, RTN and GND Pins
        6. 8.3.5.6 Thermal Shutdown
        7. 8.3.5.7 Low Current Shutdown Control (SHDN)
    4. 8.4 Device Functional Modes
  9. Application and Implementation
    1. 9.1 Application Information
    2. 9.2 Typical Application
      1. 9.2.1 Design Requirements
      2. 9.2.2 Detailed Design Procedure
        1. 9.2.2.1 Step by Step Design Procedure
        2. 9.2.2.2 Setting Undervoltage Lockout and Overvoltage Set Point for Operating Voltage Range
        3. 9.2.2.3 Programming the Current-Limit Threshold—R(ILIM) Selection
        4. 9.2.2.4 Programming Current Monitoring Resistor—RIMON
        5. 9.2.2.5 Limiting the Inrush Current
          1. 9.2.2.5.1 Selection of Input TVS for Transient Protection
      3. 9.2.3 Application Curves
  10. 10Power Supply Recommendations
    1. 10.1 Transient Protection
  11. 11Layout
    1. 11.1 Layout Guidelines
    2. 11.2 Layout Example
  12. 12デバイスおよびドキュメントのサポート
    1. 12.1 ドキュメントのサポート
      1. 12.1.1 関連資料
    2. 12.2 ドキュメントの更新通知を受け取る方法
    3. 12.3 コミュニティ・リソース
    4. 12.4 商標
    5. 12.5 静電気放電に関する注意事項
    6. 12.6 Glossary
  13. 13メカニカル、パッケージ、および注文情報

パッケージ・オプション

デバイスごとのパッケージ図は、PDF版データシートをご参照ください。

メカニカル・データ(パッケージ|ピン)
  • PWP|16
サーマルパッド・メカニカル・データ
発注情報

Overvoltage Protection (OVP)

The device incorporates circuitry to protect the system during overvoltage conditions. This device features an overvoltage cut off functionality. A voltage more than V(OVPR) on OVP pin turns off the internal FET and protects the downstream load. To program the OVP threshold, connect a resistor divider from IN supply to OVP terminal to RTN as shown in Figure 21. OVP Overvoltage Cut-off response is shown in Figure 22. OVP pin must not be left floating. If OVP pin could be floating due to dry soldering, an additional zener diode at the output will be required for protection from over voltage.

LM76202-Q1 bd-uvlo-ovp-slvsem1.gifFigure 21. OVP Threshold Setting
LM76202-Q1 overvoltage36v-ovp-cutoff-SLVSFD0.pngFigure 22. OVP Overvoltage Cut-Off

Programmable overvoltage clamp can also be achieved using LM76202-Q1 by connecting the resistor ladder from Vout to OVP to RTN as shown in Figure 23 . This results in clamping of output voltage close to OVP set-point by resistors R1 and R2. as shown in Figure 24. This scheme will also help in achieving minimal system Iq during off state. For this OVP configurataion, use R1 > 90 kΩ.

LM76202-Q1 bd-ovp-output-slvsem1.gif
Figure 23. Programmable OV Clamp
LM76202-Q1 24v-load-dump.gifFigure 24. Programmable Overvoltage Clamp Response

The LM76202-Q1 device also features an internally fixed 38 V overvoltage clamp (VOVC) functionality. The OVP terminal of theLM76202-Q1 device must be connected to the RTN terminal directly as shown in Figure 25. The LM76202-Q1 clamps the output voltage to VOVC, when the input voltage exceeds 38 V. During the output voltage clamp operation, the power dissipation in the internal MOSFET is PD = (VIN – VOVC) × IOUT. Excess power dissipation for prolonged period can make the device to enter into thermal shutdown. Figure 26 illustrates the overvoltage clamp functionality.

LM76202-Q1 bd-ovp-rtn-slvsem1.gifFigure 25. Internal Fixed OV Clamp Setting
LM76202-Q1 scope_shot_06_slvsdg2.pngFigure 26. Internal OV Clamp Response