JAJSIG5C May   2019  – December 2024 LMG1025-Q1

PRODUCTION DATA  

  1.   1
  2. 特長
  3. アプリケーション
  4. 概要
  5. Pin Configuration and Functions
  6. Specifications
    1. 5.1 Absolute Maximum Ratings
    2. 5.2 ESD Ratings
    3. 5.3 Recommended Operating Conditions
    4. 5.4 Thermal Information
    5. 5.5 Electrical Characteristics
    6. 5.6 Switching Characteristics
    7. 5.7 Typical Characteristics
  7. Detailed Description
    1. 6.1 Overview
    2. 6.2 Functional Block Diagram
    3. 6.3 Feature Description
      1. 6.3.1 Input Stage
      2. 6.3.2 Output Stage
      3. 6.3.3 Bias Supply and Under Voltage Lockout
      4. 6.3.4 Overtemperature Protection (OTP)
    4. 6.4 Device Functional Modes
  8. Application and Implementation
    1. 7.1 Application Information
    2. 7.2 Typical Application
      1. 7.2.1 Design Requirements
      2. 7.2.2 Detailed Design Procedure
        1. 7.2.2.1 Handling Ground Bounce
        2. 7.2.2.2 Creating Nanosecond Pulse
        3. 7.2.2.3 VDD and Overshoot
        4. 7.2.2.4 Operating at Higher Frequency
      3. 7.2.3 Application Curves
  9. Power Supply Recommendations
  10. Layout
    1. 9.1 Layout Guidelines
      1. 9.1.1 Gate Drive Loop Inductance and Ground Connection
      2. 9.1.2 Bypass Capacitor
    2. 9.2 Layout Example
  11. 10Device and Documentation Support
    1. 10.1 Device Support
      1. 10.1.1 サード・パーティ製品に関する免責事項
    2. 10.2 ドキュメントの更新通知を受け取る方法
    3. 10.3 サポート・リソース
    4. 10.4 静電気放電に関する注意事項
    5. 10.5 Trademarks
    6. 10.6 用語集
  12. 11Revision History
  13. 12Mechanical, Packaging, and Orderable Information

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Application Information

To operate GaN FET or MOSFET at very high switching frequencies and to reduce associated switching losses, a powerful gate driver is employed between the PWM output of controller and the gate of the GaN transistor. Also, gate drivers are indispensable when the outputs of the PWM controller do not meet the voltage or current levels needed to directly drive the gates of the switching devices. With the advent of digital power, this situation is often encountered because the PWM signal from the digital controller is often a 3.3-V logic signal, which cannot effectively turn on a power switch. A level-shift circuit is needed to boost the 3.3-V signal to the gate-drive voltage (such as 5 V) in order to fully turn on the power device and minimize conduction losses.

Gate drivers effectively provide the buffer-drive functions. Gate drivers also address other needs such as minimizing the effect of high-frequency switching noise (by placing the high-current driver IC physically close to the power switch), reducing power dissipation and thermal stress in controllers by moving gate charge power losses from the controller into the driver.

The LMG1025-Q1 is a high frequency low-side gate driver for enhancement mode GaN FETs and Si FETs in a single ended configuration. The split-gate outputs with strong source and sink capability provides flexibility to adjust the turn-on and turn-off strength independently. As a low side driver, LMG1025-Q1 can be used in a variety of applications, including different power converters, LiDAR, time-of-flight (ToF) laser drivers, class-E wireless chargers, synchronous rectifiers, and augmented reality devices. LMG1025-Q1 can also be used as a high frequency low current laser diode driver, or as a signal buffer with very fast rise/fall time.