JAJSLV7A October 2022 – December 2022 LMG2610
PRODUCTION DATA
The current-sense emulation function creates a scaled replica of the low-side GaN power FET positive drain current at the output of the CS pin. The current-sense emulation gain, GCSE, is 1 mA output from the CS pin, ICS for every 1 A passing into the drain of the low-side GaN power FET, ID.
The CS pin is terminated with a resistor to AGND, RCS, to create the current-sense voltage input signal to the external power supply controller.
RCS is determined by solving for the traditional current-sense design resistance, RCS(trad), and multiplying by the inverse of GCSE. The traditional current-sense design creates the current-sense voltage, VCS(trad), by passing the low-side GaN power FET drain current, ID, through RCS(trad). The LMG2610 creates the current-sense voltage, VCS, by passing the CS pin output current, ICS, through RCS. The current-sense voltage must be the same for both designs.
The CS pin is clamped internally to a typical 2.5 V. The clamp protects vulnerable power-supply controller current-sense input pins from over voltage if, for example, the current sense resistor on the CS pin were to become disconnected.
Figure 8-2 shows the current-sense emulation operation. In both cycles, the CS pin current emulates the low-side GaN power-FET drain current while the low-side FET is enabled. The first cycle shows normal operation where the controller turns off the low-side GaN power FET when the controller current-sense input threshold is tripped. The second cycle shows a fault situation where the LMG2610 Over-Current Protection turns off the low-side GaN power FET before the controller current-sense input threshold is tripped. In this second cycle, the LMG2610 avoids a hung controller INL pulse by generating a fast-ramping artificial current-sense emulation signal to trip the controller current-sense input threshold. The artificial signal persists until the INL pin goes to logic-low which indicates the controller is back in control of switch operation.