The turn-on slew rate of both the low-side and high-side GaN power FETs are individually programmed to one of four discrete settings. The low-side slew rate is programmed by the resistance between the RDRVL and AGND pins. The high-side slew rate is programmed by the resistance between the RDRVH and SW pins. The low-side slew-rate setting is determined one time during AUX power up when the AUX voltage goes above the AUX power-on reset voltage. The high-side slew-rate setting is determined one time during BST-to-SW power up when the BST-to-SW voltage goes above the BST power-on reset voltage. The slew-rate setting determination time is not specified but is around 0.4µs.

Table 7-1 shows the recommended typical resistance programming value for the four slew rate settings and the typical turn-on slew rate at each setting. As noted in the table, an open-circuit connection is acceptable for programming slew-rate setting 0 and a short-circuit connection (RDRVL shorted to AGND for the low-side turn-on slew rate) (RDRVH shorted to SW for the high-side turn-on slew rate) is acceptable for programming slew-rate setting 3.