JAJSLK5B
October 2020 – May 2022
LMG3422R050
,
LMG3425R050
PRODUCTION DATA
1
特長
2
アプリケーション
3
概要
4
Revision History
5
Device Comparison
6
Pin Configuration and Functions
7
Specifications
7.1
Absolute Maximum Ratings
7.2
ESD Ratings
7.3
Recommended Operating Conditions
7.4
Thermal Information
7.5
Electrical Characteristics
7.6
Switching Characteristics
7.7
Typical Characteristics
8
Parameter Measurement Information
8.1
Switching Parameters
8.1.1
Turn-On Times
8.1.2
Turn-Off Times
8.1.3
Drain-Source Turn-On Slew Rate
8.1.4
Turn-On and Turn-Off Switching Energy
9
Detailed Description
9.1
Overview
9.2
Functional Block Diagram
9.3
Feature Description
9.3.1
GaN FET Operation Definitions
9.3.2
Direct-Drive GaN Architecture
9.3.3
Drain-Source Voltage Capability
9.3.4
Internal Buck-Boost DC-DC Converter
9.3.5
VDD Bias Supply
9.3.6
Auxiliary LDO
9.3.7
Fault Detection
9.3.7.1
Overcurrent Protection and Short-Circuit Protection
9.3.7.2
Overtemperature Shutdown
9.3.7.3
UVLO Protection
9.3.7.4
Fault Reporting
9.3.8
Drive Strength Adjustment
9.3.9
Temperature-Sensing Output
9.3.10
Ideal-Diode Mode Operation
9.4
Start Up Sequence
9.5
Safe Operation Area (SOA)
9.5.1
Safe Operation Area (SOA) - Repetitive SOA
9.6
Device Functional Modes
10
Application and Implementation
10.1
Application Information
10.2
Typical Application
10.2.1
Design Requirements
10.2.2
Detailed Design Procedure
10.2.2.1
Slew Rate Selection
10.2.2.1.1
Start-Up and Slew Rate With Bootstrap High-Side Supply
10.2.2.2
Signal Level-Shifting
10.2.2.3
Buck-Boost Converter Design
10.2.3
Application Curves
10.3
Do's and Don'ts
11
Power Supply Recommendations
11.1
Using an Isolated Power Supply
11.2
Using a Bootstrap Diode
11.2.1
Diode Selection
11.2.2
Managing the Bootstrap Voltage
12
Layout
12.1
Layout Guidelines
12.1.1
Solder-Joint Reliability
12.1.2
Power-Loop Inductance
12.1.3
Signal-Ground Connection
12.1.4
Bypass Capacitors
12.1.5
Switch-Node Capacitance
12.1.6
Signal Integrity
12.1.7
High-Voltage Spacing
12.1.8
Thermal Recommendations
12.2
Layout Examples
13
Device and Documentation Support
13.1
Documentation Support
13.1.1
Related Documentation
13.2
Receiving Notification of Documentation Updates
13.3
サポート・リソース
13.4
Trademarks
13.5
Electrostatic Discharge Caution
13.6
Export Control Notice
13.7
Glossary
14
Mechanical, Packaging, and Orderable Information
パッケージ・オプション
メカニカル・データ(パッケージ|ピン)
RQZ|54
サーマルパッド・メカニカル・データ
発注情報
jajslk5b_oa
jajslk5b_pm
13.1.1
Related Documentation
Texas Instruments,
High Voltage Half Bridge Design Guide for LMG3410 Smart GaN FET
application note.
Texas Instruments,
A New Approach to Validate GaN FET Reliability to Power-line Surges Under Use-conditions.