JAJSS46
November 2023
LMG3612
PRODUCTION DATA
1
1
特長
2
アプリケーション
3
概要
4
Pin Configuration and Functions
5
Specifications
5.1
Absolute Maximum Ratings
5.2
ESD Ratings
5.3
Recommended Operating Conditions
5.4
Thermal Information
5.5
Electrical Characteristics
5.6
Switching Characteristics
5.7
Typical Characteristics
6
Parameter Measurement Information
6.1
GaN Power FET Switching Parameters
7
Detailed Description
7.1
Overview
7.2
Functional Block Diagram
7.3
Feature Description
7.3.1
GaN Power FET Switching Capability
7.3.2
Turn-On Slew-Rate Control
7.3.3
Input Control Pin (IN)
7.3.4
AUX Supply Pin
7.3.4.1
AUX Power-On Reset
7.3.4.2
AUX Under-Voltage Lockout (UVLO)
7.3.5
Overtemperature Protection
7.3.6
Fault Reporting
7.4
Device Functional Modes
8
Application and Implementation
8.1
Application Information
8.2
Typical Application
8.2.1
Design Requirements
8.2.2
Detailed Design Procedure
8.2.2.1
Turn-On Slew-Rate Design
8.3
Power Supply Recommendations
8.4
Layout
8.4.1
Layout Guidelines
8.4.1.1
Solder-Joint Stress Relief
8.4.1.2
Signal-Ground Connection
8.4.2
Layout Example
9
Device and Documentation Support
9.1
Documentation Support
9.1.1
Related Documentation
9.2
ドキュメントの更新通知を受け取る方法
9.3
サポート・リソース
9.4
Trademarks
9.5
静電気放電に関する注意事項
9.6
用語集
10
Revision History
11
Mechanical, Packaging, and Orderable Information
パッケージ・オプション
メカニカル・データ(パッケージ|ピン)
REQ|38
MPQF705A
サーマルパッド・メカニカル・データ
発注情報
jajss46_oa
8.2.1
Design Requirements
Table 8-1 Design Specification
SPECIFICATION
VALUE
Input DC voltage range
365 VDC to 410 VDC
Output DC voltage
12
V
Ouput rated current
23.34
A
Output voltage ripple at 390 VDC
120
mVpp
Peak efficiency at 390 VDC
93
%