JAJSMU3C August   2021  – November 2022 LMH32404

PRODUCTION DATA  

  1. 1 特長
  2. 2 アプリケーション
  3. 3 概要
  4. 4 Revision History
  5. 5 Pin Configuration and Functions
  6. 6 Specifications
    1. 6.1 Absolute Maximum Ratings
    2. 6.2 ESD Ratings
    3. 6.3 Recommended Operating Conditions
    4. 6.4 Thermal Information
    5. 6.5 Electrical Characteristics
    6. 6.6 Electrical Characteristics: Logic Threshold and Switching Characteristics
    7. 6.7 Typical Characteristics
  7. 7 Detailed Description
    1. 7.1 Overview
    2. 7.2 Functional Block Diagram
    3. 7.3 Feature Description
      1. 7.3.1 Clamping and Input Protection
      2. 7.3.2 ESD Protection
      3. 7.3.3 Differential Output Stage
    4. 7.4 Device Functional Modes
      1. 7.4.1 Ambient Light Cancellation (ALC) Mode
      2. 7.4.2 Channel Multiplexer Mode
      3. 7.4.3 Low-Power Mode
  8. 8 Application and Implementation
    1. 8.1 Application Information
    2. 8.2 Typical Application
      1. 8.2.1 Standard TIA Application
        1. 8.2.1.1 Design Requirements
        2. 8.2.1.2 Detailed Design Procedure
        3. 8.2.1.3 Application Curves
      2. 8.2.2 Increase Channel Density for Optical Front-End Systems
        1. 8.2.2.1 Application Curves
  9. 9 Power Supply Recommendations
  10. 10Layout
    1. 10.1 Layout Guidelines
    2. 10.2 Layout Example
  11. 11Device and Documentation Support
    1. 11.1 Device Support
      1. 11.1.1 Development Support
    2. 11.2 Documentation Support
      1. 11.2.1 Related Documentation
    3. 11.3 Receiving Notification of Documentation Updates
    4. 11.4 サポート・リソース
    5. 11.5 Trademarks
    6. 11.6 Electrostatic Discharge Caution
    7. 11.7 Glossary
  12. 12Mechanical, Packaging, and Orderable Information

パッケージ・オプション

メカニカル・データ（パッケージ｜ピン）
サーマルパッド・メカニカル・データ
発注情報

6.6 Electrical Characteristics: Logic Threshold and Switching Characteristics

VDD = 3.3 V, VOCM = Open, VOD = 0 V, CPD (1) = 1 pF, EN = 0 V, IDC_EN = 3.3 V, RL = 100 Ω (differential load between OUT+ and OUT-), and TA = 25℃. (unless otherwise noted)
PARAMETER TEST CONDITIONS MIN TYP MAX UNIT
LOGIC THRESHOLD PERFORMANCE
Logic pin bias current 75 120 µA
EN , IDC_EN, disable threshold voltage Disabled above this voltage 1.5 2 V
EN , IDC_EN, enable threshold voltage Enabled below this voltage 0.8 1 V
MX control, enable threshold voltage Switch closed above this voltage 1.5 2 V
MX control, disable threshold voltage Switch open below this voltage 0.8 1.0 V
EN CONTROL TRANSIENT PERFORMANCE
Enable transition-time (1% settling) Ambient loop disabled, fIN = 25 MHz, VOUT = 1 VPP, IDC = 0 µA 250 ns
Disable transition-time (1% settling) Ambient loop disabled, fIN = 25 MHz, VOUT = 1 VPP, IDC = 0 µA 8 ns
Enable transition-time (1% settling) Ambient loop enabled, fIN = 25 MHz, VOUT = 1 VPP, IDC = 100 µA 4 µs
Disable transition-time (1% settling) Ambient loop enabled, fIN = 25 MHz, VOUT = 1 VPP, IDC = 100 µA 3 ns
MULTIPLEXER CONTROL TRANSIENT PERFORMANCE
Channel to Channel transition-time
(1% settling)		 Ambient loop disabled, 0 → 0.5V transition at VOUT. 10 ns
Disable transition-time (1% settling) Ambient loop disabled, fIN = 25 MHz, VOUT = 1 VPP, IDC = 0 µA 8 ns
(1) Input capacitance of photodiode.