JAJSEU5D
October 2014 – February 2018
LMH5401
PRODUCTION DATA.
1
特長
2
アプリケーション
歪みと周波数との関係(G=12dB、SE-DE、RL=200rep%#937;、VPP=2V)
3
概要
ADC12J4000を駆動するLMH5401
4
改訂履歴
5
Pin Configuration and Functions
Pin Functions
6
Specifications
6.1
Absolute Maximum Ratings
6.2
ESD Ratings
6.3
Recommended Operating Conditions
6.4
Thermal Information
6.5
Electrical Characteristics: VS = 5 V
6.6
Electrical Characteristics: VS = 3.3 V
6.7
Typical Characteristics: 5 V
6.8
Typical Characteristics: 3.3 V
6.9
Typical Characteristics: 3.3-V to 5-V Supply Range
7
Parameter Measurement Information
7.1
Output Reference Points
7.2
ATE Testing and DC Measurements
7.3
Frequency Response
7.4
S-Parameters
7.5
Frequency Response with Capacitive Load
7.6
Distortion
7.7
Noise Figure
7.8
Pulse Response, Slew Rate, and Overdrive Recovery
7.9
Power Down
7.10
VCM Frequency Response
7.11
Test Schematics
8
Detailed Description
8.1
Overview
8.2
Functional Block Diagram
8.3
Feature Description
8.3.1
Fully-Differential Amplifier
8.3.1.1
Power Down and Ground Pins
8.3.2
Operations for Single-Ended to Differential Signals
8.3.2.1
AC-Coupled Signal Path Considerations for Single-Ended Input to Differential Output Conversion
8.3.2.2
DC-Coupled Input Signal Path Considerations for SE-DE Conversions
8.3.2.3
Resistor Design Equations for Single-to-Differential Applications
8.3.2.4
Input Impedance Calculations
8.3.3
Differential-to-Differential Signals
8.3.3.1
AC-Coupled, Differential-Input to Differential-Output Design Issues
8.3.3.2
DC-Coupled, Differential-Input to Differential-Output Design Issues
8.3.4
Output Common-Mode Voltage
8.3.5
LMH5401 Comparison
8.4
Device Functional Modes
8.4.1
Operation With a Split Supply
8.4.2
Operation With a Single Supply
9
Application and Implementation
9.1
Application Information
9.1.1
Stability
9.1.2
Input and Output Headroom Considerations
9.1.3
Noise Analysis
9.1.4
Noise Figure
9.1.5
Thermal Considerations
9.2
Typical Application
9.2.1
Design Requirements
9.2.2
Detailed Design Procedure
9.2.2.1
Driving Matched Loads
9.2.2.2
Driving Unmatched Loads For Lower Loss
9.2.2.3
Driving Capacitive Loads
9.2.2.4
Driving ADCs
9.2.2.4.1
SNR Considerations
9.2.2.4.2
SFDR Considerations
9.2.2.4.3
ADC Input Common-Mode Voltage Considerations : AC-Coupled Input
9.2.2.4.4
ADC Input Common-Mode Voltage Considerations : DC-Coupled Input
9.2.2.5
GSPS ADC Driver
9.2.2.6
Common-Mode Voltage Correction
9.2.2.7
Active Balun
9.2.3
Application Curves
9.3
Do's and Don'ts
9.3.1
Do:
9.3.2
Don't:
10
Power Supply Recommendations
10.1
Supply Voltage
10.2
Single-Supply
10.3
Split-Supply
10.4
Supply Decoupling
11
Layout
11.1
Layout Guidelines
11.2
Layout Example
12
デバイスおよびドキュメントのサポート
12.1
デバイス・サポート
12.1.1
デバイスの項目表記
12.2
ドキュメントのサポート
12.2.1
関連資料
12.3
ドキュメントの更新通知を受け取る方法
12.4
コミュニティ・リソース
12.5
商標
12.6
静電気放電に関する注意事項
12.7
Glossary
13
メカニカル、パッケージ、および注文情報
パッケージ・オプション
メカニカル・データ(パッケージ|ピン)
RMS|14
MPQF401
サーマルパッド・メカニカル・データ
発注情報
jajseu5d_oa
jajseu5d_pm
8.2
Functional Block Diagram
V– and GND are isolated.